I think i have forgot something with lockfree_mpmc...
Please follow with me...
The Intel x86 memory model, detailed in Intel 64 Architecture Memory Ordering White Paper
and the AMD spec, AMD64 Architecture Programmers Manual, list a lot of memory ordering
guarantees, among them:
Loads are not reordered with other loads.
Stores are not reordered with other stores.
Stores are not reordered with older loads.
In a multiprocessor system, memory ordering obeys causality (memory ordering respects transitive visibility).
In a multiprocessor system, stores to the same location have a total order.
In a multiprocessor system, locked instructions have a total order.
Loads and stores are not reordered with locked instructions.
But since on x86 Loads may be reordered with older stores to different locations
So please take a look at the following lockfree_mpmc code:
function TLockfree_MPMC.push(tm : tNodeQueue):boolean;
if getlength >= fsize
 if CAS(tail,lasttail,newtemp)
So the the loads of lasttail and newtemp in  line can be reordered
with older stores of lastail and newtemp in  , so in this case must
i insert an mfence in line  to respect the logic of the program?...
Amine Moulay Ramdane.