I hope this forum is the right place to ask this question, please forgive me if it is not.
I am trying to run some benchmarks to measure the read and write sets available in RTM on a Haswell machine. However, the results I get are quite surprising, since they are larger than the L1 and L2 caches: I find the maximum write set is about 280 KB and the read set is about 512 KB....which should not be possible according to the Intel specification (the write set should not exceed L1 cache capacity, 64KB, and the read set should not exceed L2 cache capacity, 256KB).
I must be doing something wrong, but I cannot tell what exactly. The principle of my benchmark is quite straightforward: I allocate a big array (100MB), and I try to access a specific size from inside a transaction. I increase the accessed size until the transaction fails with a capacity abort.
Can someone provide some insight about this behaviour?