I have some questions about the resources shared among logical cores on Skylake processors. I found the Intel manual here: https://www.intel.com/content/dam/www/public/us/en/documents/manuals/64-...
On page 36, Table 2-5 demonstrates that the ITLB is dynamically partitioned, while all other levels of TLBs are fixed partitioned. As far as I know on Sandy Bridge, the configurations are the opposite, where "the ITLB is partitioned 50/50 statically under HT, DTLB and shared TLB are partitioned on demand, not necessarily 50/50" (https://software.intel.com/en-us/forums/intel-moderncode-for-parallel-ar...).
According to my experiment on I7-6700k (skylake), it is inline with Sandy Bridge. For a brief explanation, I used cpuid to query the number of TLB entries. While HT is enabled, 64/64/1536 entries are available for ITLB/DTLB/STLB respectively; while HT is disabled, 128/64/1536 entries are available.
This really confuses me. Thanks