Intel® Developer Zone:
Intel® Moderncode for Parallel Architectures

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Tap our experts and your peers to help meet the challenge of developing applications on modern hardware. This is the place to ask questions (and get answers) related to all aspects of parallel programming on Intel® Architecture.

This is a peer forum for developers using Intel® technology. Response times vary depending on the complexity of your issue.
Private messages can only be initiated by Intel employees and members of the Intel® Black Belt Developer program.
Topic / Topic starter Post date Replies Last Post
Normal topic Hyperthreading on Sandy Bridge
by mike_wilson
Mon, 10/31/2011 - 18:34 14
by mike_wilson
Mon, 11/07/2011 - 18:26
Normal topic Looking for CUDA support
by Harsh
Tue, 12/10/2013 - 07:07 1
by jeffwrite
Wed, 12/25/2013 - 18:51
Normal topic ANN: My Scalable Parallel C++ Conjugate Gradient System Solver Library is here...
by aminer10
Mon, 05/23/2016 - 09:22 2
by aminer10
Wed, 05/25/2016 - 08:14
Normal topic Local APIC questions,how can all local apics use the same base address to access their registers?
by magina
Sat, 06/06/2009 - 22:11 2
by magina
Sat, 06/06/2009 - 22:11
Normal topic Chipset P55 - Sync Itunes
by rabbitou
Mon, 03/22/2010 - 00:55 1
by Tim P.
Mon, 03/22/2010 - 00:55
Normal topic to hyperthread or not with single threaded application
by (name withheld)
Mon, 11/29/2004 - 16:54 4
by Clay B.
Fri, 11/11/2005 - 17:20
Normal topic Synchronization Algorithm Verificator for C++0x
by Dmitry Vyukov
Sun, 08/03/2008 - 00:54 2
by Dmitry Vyukov
Sun, 08/03/2008 - 00:54
Normal topic Thread safety of a third party DLL
by shwetha-doss (Intel)
Tue, 12/06/2005 - 01:15 5
by Clay B.
Thu, 12/22/2005 - 21:50
Normal topic Application level threading of 2D DFT
by packj
Wed, 11/17/2010 - 13:18 4
by Gennady F. (Intel)
Wed, 11/17/2010 - 13:18
Normal topic Parallelcompression library was updated to version 2.16 ...
by aminer10
Sat, 05/19/2012 - 14:35 2
by tomorrowwillbefine
Mon, 05/28/2012 - 01:12
Normal topic OpenMP 4.0 task depend too limited would TBB be better?
by Nicholas B.
Sun, 11/23/2014 - 03:04 0
by Nicholas B.
Sun, 11/23/2014 - 03:04
Normal topic mpiexec does not run
by Hewei S.
Fri, 12/30/2016 - 16:01 0
by Hewei S.
Fri, 12/30/2016 - 16:01
Normal topic Hyperthreading, IVF and OpenMP
by (name withheld)
Thu, 08/04/2005 - 00:59 3
by Tim P.
Thu, 08/04/2005 - 00:59
Normal topic Practical examples of multi-threading in games source code ?
by tuan.kuranes
Tue, 08/29/2006 - 10:27 0
by tuan.kuranes
Tue, 08/29/2006 - 10:27
Normal topic Intel DG965MQ MB bios ICH Temp and Vcore setup?
by thuppu
Wed, 06/06/2007 - 10:50 0
by thuppu
Wed, 06/06/2007 - 10:50
Normal topic Source code for kernel level multi-core initialization
by Frank Miller
Wed, 10/01/2008 - 16:09 4
by Adam
Wed, 10/01/2008 - 16:09
Normal topic Relacy detects very subtle race-condition in blink of an eye!
by Chris M. Thomasson
Wed, 08/12/2009 - 15:53 0
by Chris M. Thomasson
Wed, 08/12/2009 - 15:53
Normal topic How to help Windows understand shared caches
by (name withheld)
Tue, 01/23/2007 - 22:32 6
by Tim P.
Tue, 01/23/2007 - 22:32
Normal topic Welcome to the forum
by David Solomon (...
Mon, 05/05/2003 - 17:23 0
by David Solomon (...
Mon, 05/05/2003 - 17:23
Normal topic Intel Processor with Dual core
by (name withheld)
Tue, 09/25/2007 - 00:12 0
by (name withheld)
Tue, 09/25/2007 - 00:12
Normal topic miss cache
by sammoura
Thu, 04/15/2010 - 11:31 0
by sammoura
Thu, 04/15/2010 - 11:31
Normal topic Measuring QPI bandwidth
by (name withheld)
Fri, 03/18/2011 - 09:18 0
by (name withheld)
Fri, 03/18/2011 - 09:18
Normal topic cuda programming from intel c/c++
by Jorge Nunez
Sun, 09/02/2012 - 22:44 1
by R Lloyd Rankin
Sun, 09/09/2012 - 19:35
Normal topic OpenMP 4 - testing offload directives in an emulated enviornment
by Marco Jacopo F.
Fri, 08/21/2015 - 02:24 1
by Marco Jacopo F.
Fri, 08/21/2015 - 04:24
Normal topic omp thread
by roddur
Sun, 01/11/2009 - 21:38 10
by jimdempseyatthecove
Sun, 01/11/2009 - 21:48
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Hot topic with new posts
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For more complete information about compiler optimizations, see our Optimization Notice.