How to control MSRs percore on Intel Core 2

How to control MSRs percore on Intel Core 2

Hi all,

In the Software Developer's Manual, it is said that, for Intel Core 2 processor family,MSRs are categorized into Unique and Shared, and Unique means each processor core has a separate MSR.

So, I would like to ask if I could independently control theUnique MSRspercore? Such as the prefetcher on the L1 cache?

Thanks in advence!

2 posts / 0 new
Last post
For more complete information about compiler optimizations, see our Optimization Notice.


Yes, that's correct. Unique means that there's a separate MSR per core and can be written and read per core. So,prefetch controls defined per core as "unique" can thus be controlled accordingly.


Leave a Comment

Please sign in to add a comment. Not a member? Join today