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Intel® Performance Bottleneck Analyzer (Archived)

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The Intel® Performance Bottleneck Analyzer (Intel® PBA) framework can be used to identify and prioritize issues specific to current and future Intel® architectures. This forum should be used to discuss questions, issues, or usages for the framework.

For more information, please see:  http://software.intel.com/en-us/articles/intel-performance-bottleneck-analyzer/
Topic / Topic starter Post date Repliessort descending Last Post
Normal topic MITE Micro-ops to IDQ
by Patrick Konsor ...
Fri, 08/24/2012 - 14:28 0
by Patrick Konsor ...
Fri, 08/24/2012 - 14:28
Normal topic Bad Speculation Speculative Uops
by Charlie Hewett ...
Thu, 09/20/2012 - 13:51 0
by Charlie Hewett ...
Thu, 09/20/2012 - 13:51
Normal topic ICACHE.MISSES
by christine-lin (...
Fri, 09/07/2012 - 11:43 0
by christine-lin (...
Fri, 09/07/2012 - 11:43
Normal topic Back End 1 Uop Executed
by Charlie Hewett ...
Thu, 09/20/2012 - 15:25 0
by Charlie Hewett ...
Thu, 09/20/2012 - 15:25
Normal topic Inline Function Opportunity
by Michael Chynowe...
Wed, 11/07/2012 - 14:59 0
by Michael Chynowe...
Wed, 11/07/2012 - 14:59
Normal topic Uops from the legacy decode pipeline
by Charlie Hewett ...
Tue, 09/18/2012 - 16:34 0
by Charlie Hewett ...
Tue, 09/18/2012 - 16:34
Normal topic Front End Bandwidth Limited Due To Supply Out Of The Legacy Decode Pipeline
by Charlie Hewett ...
Tue, 09/18/2012 - 17:03 0
by Charlie Hewett ...
Tue, 09/18/2012 - 17:03
Normal topic Port 3 Utilization
by Charlie Hewett ...
Thu, 09/20/2012 - 13:39 0
by Charlie Hewett ...
Thu, 09/20/2012 - 13:39
Normal topic Instruction Starvation
by Patrick Konsor ...
Fri, 08/17/2012 - 16:08 0
by Patrick Konsor ...
Fri, 08/17/2012 - 16:08
Normal topic Cache line replacement study
by Michael Chynowe...
Mon, 09/03/2012 - 09:14 0
by Michael Chynowe...
Mon, 09/03/2012 - 09:14
Normal topic Back End Bound Due To Latency Caused By L2 Cache
by Charlie Hewett ...
Thu, 09/20/2012 - 15:13 0
by Charlie Hewett ...
Thu, 09/20/2012 - 15:13
Normal topic Categorizing delivery of micro-ops from front end to back end of the instruction pipeline
by Michael Chynowe...
Thu, 09/13/2012 - 13:11 0
by Michael Chynowe...
Thu, 09/13/2012 - 13:11
Normal topic AGEN_STALL
by Erik Niemeyer (...
Tue, 09/25/2012 - 08:12 0
by Erik Niemeyer (...
Tue, 09/25/2012 - 08:12
Normal topic Machine clears due to self modifying code
by Rajshree Chabuk...
Fri, 12/07/2012 - 16:50 0
by Rajshree Chabuk...
Fri, 12/07/2012 - 16:50
Normal topic Front End Bound Due To Latency Caused By L1 or i-TLB misses
by Charlie Hewett ...
Tue, 09/18/2012 - 16:40 0
by Charlie Hewett ...
Tue, 09/18/2012 - 16:40
Normal topic Retiring
by Charlie Hewett ...
Tue, 09/18/2012 - 17:20 0
by Charlie Hewett ...
Tue, 09/18/2012 - 17:20
Normal topic ERROR: Dump file generated for ... is invalid
by Jonathan Moore
Fri, 08/19/2011 - 12:11 0
by Jonathan Moore
Fri, 08/19/2011 - 12:11
Normal topic Bus Lock
by Patrick Konsor ...
Fri, 08/24/2012 - 14:27 0
by Patrick Konsor ...
Fri, 08/24/2012 - 14:27
Normal topic Bad Speculation Recovery Stalls
by Charlie Hewett ...
Thu, 09/20/2012 - 13:50 0
by Charlie Hewett ...
Thu, 09/20/2012 - 13:50
Normal topic BT CLEAR
by christine-lin (...
Fri, 09/07/2012 - 11:41 0
by christine-lin (...
Fri, 09/07/2012 - 11:41
Normal topic Back End 0 Uops Executed
by Charlie Hewett ...
Thu, 09/20/2012 - 15:21 0
by Charlie Hewett ...
Thu, 09/20/2012 - 15:21
Normal topic Store Forward Block
by Michael Chynowe...
Thu, 11/01/2012 - 13:46 0
by Michael Chynowe...
Thu, 11/01/2012 - 13:46
Normal topic Uops from the Decoded ICache
by Charlie Hewett ...
Tue, 09/18/2012 - 16:32 0
by Charlie Hewett ...
Tue, 09/18/2012 - 16:32
Normal topic Front End Bandwidth Limited Due To Supply Out Of The DSB
by Charlie Hewett ...
Tue, 09/18/2012 - 17:01 0
by Charlie Hewett ...
Tue, 09/18/2012 - 17:01
Normal topic Port 2 Utilization
by Charlie Hewett ...
Thu, 09/20/2012 - 13:39 0
by Charlie Hewett ...
Thu, 09/20/2012 - 13:39
New posts
No new posts
Hot topic with new posts
Hot topic without new posts
Sticky topic
Locked topic
For more complete information about compiler optimizations, see our Optimization Notice.