DRAM Row Buffer Page Policy

DRAM Row Buffer Page Policy


   I am working on a SandyBridge Processor.

   I want to change the row-buffer management policy of IMC.

   Currently It uses a closed page policy. I know that IMC uses

   an adaptive paging policy.

    But I want to make it open page. The only option I could think of

    is writing to the PCI Device Register which has a configurable

    Bit set for choosing Paging Policy. But doing it online will be stupid.

    My Bios does not have any option for such a change. The only

    option it has is to change memory interleaving policy.

    Any suggestions is deeply appreciated.


1 post / 0 new
For more complete information about compiler optimizations, see our Optimization Notice.