SoC Watch cpu-ddr-bw usage

SoC Watch cpu-ddr-bw usage


I want to measure cpu-ddr-bw on APL, but current version only support  cpu-ddr-mod0-bw and cpu-ddr-mod1-bw, what is the meaning of module 0 and module 1? core0 and core1 belong to module 0? core2 and core3 belong to module 1?

my program have several thread, I want to measure the total cpu-ddr bandwidth, how to get that? Thanks a lot!





cpu-ddr-mod0-bw, cpu-ddr-mod1-bw
Collection Method(s): poll
Measure the IA Core to DDR bandwidth in MB/sec using the system’s VISA/SoCHaP functionality. The
cpu-ddr-mod0-bw or cpu-ddr-mod1-bw features measure module 0 or module 1 IA core to DDR
bandwidth respectively. Only one bandwidth or DRAM Self Refresh data type can be specified at a time.

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