The CHANGES file mentions fixes for ARM in TBB 4.2 Update 2, but has this been thoroughly tested?
Methinks there should be an ISB instruction in __TBB_control_consistency_helper(), which now has only a compiler fence. Without this instruction, a control dependency is probably not sufficient to order a load after the load on which the conditional branch depends.
I have not tested this myself, but I have come across a similar situation with Power Architecture, and the helper was introduced there to issue an ISYNC instruction that made a decided difference.
Could somebody verify or explain?