just a shortish question because I am a little baffled right now. I am programming a new MLE to be used with Intel TXT. We want to launch this within a running Linux (64Bit) - this should be perfectly possible afaik. I got most of it working, TXT is working (tboot would successfully boot on previous tests!), but now I get this error whenever I execute GETSEC[SENTER]: 0xC0000481.
Decoding this tells me: it is valid (was 0 when getsec was executed), it is from the ACM, the class is 8 and the error 1. This is something like "Interrupt occured" - no further infos in the pdf with the error-code. So.. I don't know how to debug this further. Also, interrupts? Shouldn't does be disabled anyway (intel SDM about SMX tells so).
The ACM is in fact running, I had other errors before (about mtrrs and tpm), so this at least is certain and because the error-code is indeed directly from the acm, it should be happening while it is still running and not in my MLE (which is very short right now, it does "1: jmp 1b"). But what exactly is happening, can someone from Intel maybe tell some reasons why this could be happening? I have no other tools to debug this on hardware-level, so this is pretty much an dead birth if I can't get more infos on this.
My system: Q87T with an Intel i7 4770S.
ACM: 4th Gen. i5 i7 version 75
I am currently running this with a linux kernel that is NOT SMP (did it with SMP, same result; but this way all other processors should be halted anyway). My code follows the manual closely (only details are different, like I save the status right before the getsec, and not at the beginning like in the manual). I tried it with interrupts disabled and enabled before executing ACM - no difference. The kernel gets started with interrupt-remapping on but intel_iommu off (is this ok?).
Looking forward for help :=)
best regards,- Benjamin