Intel® Developer Zone:
Software Tuning, Performance Optimization & Platform Monitoring

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Discussion around topics such as monitoring and software tuning methodologies, Performance Monitoring Unit (PMU) of Intel microprocessors, software characterization, software optimization techniques for performance and power/energy, monitoring CPU core and graphics processors and other system coprocessors as well asimmerging runtime usages for software metering and quality of service.
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Topic / Topic starter Post date Replies Last Postsort ascending
Normal topic How to control the four hardware prefetchers in L1 and L2 more flexibly?
by hiratz s.
Fri, 02/24/2017 - 14:24 8
by Tim P.
Wed, 05/23/2018 - 16:35
Normal topic Retired DTLB misses
by Zhu, Weixi
Wed, 05/23/2018 - 13:18 0
by Zhu, Weixi
Wed, 05/23/2018 - 13:18
Normal topic Performance Counters Used For CPU Metrics Reference
by Chetan Arvind Patil
Sun, 05/20/2018 - 13:36 1
by Dmitry Ryabtsev...
Sun, 05/20/2018 - 23:10
Normal topic I-cache sharing between processes on Linux
by Yeager, David
Fri, 05/18/2018 - 11:38 0
by Yeager, David
Fri, 05/18/2018 - 11:38
Normal topic TSC frequency variations with temperature
by Cao, Henry
Thu, 05/17/2018 - 23:05 1
by McCalpin, John
Fri, 05/18/2018 - 10:38
Normal topic Cache Blocking and Prefetching
by Chiarelli, Marco
Fri, 04/27/2018 - 05:57 5
by dkokron
Thu, 05/17/2018 - 10:25
Normal topic VTune Top Down PMU Counters For Xeon Phi
by Chetan Arvind Patil
Thu, 04/26/2018 - 19:15 14
by Chetan Arvind Patil
Wed, 05/16/2018 - 15:50
Normal topic build error in "Fast memcpy with SPDK and Intel® I/OAT DMA Engine"
by Wang, Martin
Tue, 05/15/2018 - 06:11 0
by Wang, Martin
Tue, 05/15/2018 - 06:11
Normal topic hardware performance counters
by Pundir, Nitin
Thu, 05/10/2018 - 12:44 3
by Thomas R.
Tue, 05/15/2018 - 03:07
Normal topic 30 cores much more slower than 32 cores at the same total cores
by GHui
Thu, 05/10/2018 - 01:32 3
by GHui
Tue, 05/15/2018 - 02:53
Normal topic RAPL DRAM energy units for Xeon Phi and Broadwell Xeon D
by Imes, Connor
Sat, 05/12/2018 - 07:16 2
by Imes, Connor
Sun, 05/13/2018 - 16:03
Normal topic Decoding the DIMM geometry
by CyrIng
Sun, 05/13/2018 - 00:53 0
by CyrIng
Sun, 05/13/2018 - 00:53
Normal topic choice of profiling characteristic
by Black.S
Sun, 05/06/2018 - 09:54 0
by Black.S
Sun, 05/06/2018 - 09:54
Normal topic hardware performance counters
by Pundir, Nitin
Thu, 05/03/2018 - 11:23 2
by McCalpin, John
Fri, 05/04/2018 - 07:01
Hot topic How can I compile the MSR driver?
by Antonio v.
Thu, 02/21/2013 - 12:23 26
by Anna (Intel)
Thu, 05/03/2018 - 09:42
Normal topic Core and L3 numbering vs physical layout on Xeon Platinum 8160 (and KNL)
by McCalpin, John
Thu, 05/03/2018 - 08:04 0
by McCalpin, John
Thu, 05/03/2018 - 08:04
Normal topic PEBS Counters and Linux "perf" utility
by Sanath Jayasena
Fri, 06/29/2012 - 14:45 4
by Chetan Arvind Patil
Tue, 05/01/2018 - 20:15
Normal topic Calculate the Max Flops on Skylake
by GHui
Tue, 03/27/2018 - 02:49 7
by McCalpin, John
Wed, 04/25/2018 - 08:36
Normal topic How many WC buffers per WC memory region?
by Zambre, Rohit
Wed, 04/18/2018 - 18:52 4
by McCalpin, John
Fri, 04/20/2018 - 14:37
Normal topic How to program GPU clock rate?
by Kocsis, Andor
Thu, 04/19/2018 - 13:22 0
by Kocsis, Andor
Thu, 04/19/2018 - 13:22
Normal topic Calculating L2 <-> L3/MEM bandwidth on Intel Skylake SP
by Thomas R.
Wed, 03/28/2018 - 07:24 3
by Thomas R.
Mon, 04/09/2018 - 01:25
Normal topic Are integers faster than floats
by Schubert, William
Fri, 03/09/2018 - 15:15 2
by Green, Max
Thu, 04/05/2018 - 02:36
Normal topic No speedup with SSE
by Gong, Xufei
Mon, 04/02/2018 - 17:53 1
by Tim P.
Wed, 04/04/2018 - 05:22
Normal topic Monitor intel CPU temperature in linux
by ddffdfd, fddgg
Wed, 04/04/2018 - 03:09 0
by ddffdfd, fddgg
Wed, 04/04/2018 - 03:09
Normal topic resource stalls on Sandy Bridge
by Yunqi Z.
Fri, 05/10/2013 - 14:00 12
by McCalpin, John
Wed, 03/28/2018 - 10:30
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For more complete information about compiler optimizations, see our Optimization Notice.