set power limit to DRAM with RAPL

set power limit to DRAM with RAPL


I want to set power limit to DRAM with using RAPL.

So I set "Enable bit" to "1" and "DRAM Power Limit" to "power limit I wanted to set" in MSR_DRAM_POWER_LIMIT register.

Then, I set Power limit of DRAM to "20W" and mesured power HPCC benchmarks with RAPL.

But the limit didn't work.

Need any other configuration?

I use Xeon E5-2680.



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Hi Tomonori,

Did you try to use Intel(r) Power Governor for that purpose?


Hi, Roman.

Thanks for the reply.

>Did you try to use Intel(r) Power Governor for that purpose?
No, I used source code our research group made.
It rewrites MSRs' bits directly.



could you try Intel(r) Power Governor utility and report if you have the same issue with it?



Thanks for your advice!
But "init the RAPL library" failed when I try to run "power_gov",and other programs use init_rapl();, too.
Why does it cause?

I use Red Hat Enterprise Linux Server release 6.1, and there are the msr and cpuid kernel modules.


Hi Tomonori,

I cannot tell why init RAPL is failing. Can you give me your email, and I will send you some source code, so that we can investigate and make it work?

thank you


Hi all,
Thank you for helping.

But I hope you don’t mind answering another question.

in the power_gov's readme,

- The DRAM RAPL is not enabled in BIOS by default.
To enable in BIOS, go to Memory Configuration and change the mode from
'Performance' to 'Power Efficient'. Then select 'Mode 1'. This is the
VR (voltage regulator) mode of power estimation.

When I changed to the 'Mode 1', are there any demerits?
and what does 'Mode 0' means?

In addition, I found the DRAM RAPL MODE in BIOS, and it can select
DRAM RAPL MODE0, 1 and disable.
These MODEs are equal to 'Mode' in power_gov's readme?



Hello Tomonori T.

The BIOS sets DDR RAPL mode though BIOS-to-Pcode Mailbox command.  In this case you may Set DRAM only, the power consumption of the main memory.

In  regards to DRAM RAPL modes you have two options: DRAM RAPL MODE0=DRAM power from pure activity based estimation and  DRAM RAPL MODE1= DRAM power from scaling activity-based estimation to match DDR VR total power (based on VR12 IOUT register)

Caesar B.

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