Scope of IA32_PERF_FIXED_CTR_CTRL Register

Scope of IA32_PERF_FIXED_CTR_CTRL Register

Does anyone know the scope of the MSR:


on SandyBridge? It is not listed in Table 35-11 of the Intel SDM Vol 3, where the scope of similar MSRs such as IA32_PERF_GLOBAL_CTRL is given.

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The scope of the MSR is 'per hw thread'.

The MSR (38dh) is listed in table 35-2 as an architectural MSR but the scope isn't listed.

I'll check with the SDM owner to see if we can get the scope listed in the table.


Thank you Patrick. 

 Scope of IA32_FIXED_CTRx( starts at MSR addressing space 0x309) which is conrolled by IA32_PERF_FIXED_CTR_CTRL is per thread.

Moreover you can set 21 bit of IA32_PERFEVTSELx to enable counters on all logical processors thus mapping measurement to any thread which happens to be executed by logical processor.If bit 21 == 0 only specified in IA32_PERFEVTSELx logical processor's thread is measured.

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