AES NI performance optimization

AES NI performance optimization



I am using iaesx64.s from Intel's sample library for disk encryption. It encrypts/decrypts 4 blocks at a time for increased performance.

I was wondering if I change the code such that it encrypts 8 blocks at a time , will that result in any performance improvement? Or will that result in too much register pressure? Are there any guidelines available to change the assembly code?

Looking forward to some advice

Many Thanks


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