Intel® Developer Zone:
Software Tuning, Performance Optimization & Platform Monitoring

Announcements
 
Discussion around topics such as monitoring and software tuning methodologies, Performance Monitoring Unit (PMU) of Intel microprocessors, software characterization, software optimization techniques for performance and power/energy, monitoring CPU core and graphics processors and other system coprocessors as well asimmerging runtime usages for software metering and quality of service.
This is a peer forum for developers using Intel® technology. Response times vary depending on the complexity of your issue.
Private messages can only be initiated by Intel employees and members of the Intel® Black Belt Developer program.
Topic / Topic starter Post date Repliessort descending Last Post
Normal topic Intel Performance Counter Monitor now supports Intel Xeon E7 series and 2nd generation Intel CoreTM processor family
by Thomas Willhalm...
Fri, 07/15/2011 - 08:26 0
by Thomas Willhalm...
Fri, 07/15/2011 - 08:26
Normal topic L2 instruction fetch misses much higher than L1 instruction fetch misses
by Marco G.
Sun, 01/29/2017 - 01:37 0
by Marco G.
Sun, 01/29/2017 - 01:37
Normal topic Different latency in desktop(i7-4770) and xeon(E5-2698) CPU
by kevin h.
Tue, 01/26/2016 - 19:00 0
by kevin h.
Tue, 01/26/2016 - 19:00
Normal topic Calculating Memory Bandwidth using perfmon2
by Shuja-ur-Rehman B.
Thu, 04/14/2016 - 03:44 0
by Shuja-ur-Rehman B.
Thu, 04/14/2016 - 03:44
Normal topic [PCM] Compilation fails when using VS 13
by Thomas Willhalm...
Thu, 06/11/2015 - 00:38 0
by Thomas Willhalm...
Thu, 06/11/2015 - 00:38
Normal topic Calculating memory stalls in second level cache
by Papote J.
Sun, 05/07/2017 - 13:25 0
by Papote J.
Sun, 05/07/2017 - 13:25
Normal topic [BUG][AVX] Invalid code generation using _mm256_unpacklo_pd and _mm256_permute2f128_pd
This topic has been moved to "Intel® C++ Compiler" (View topic)
Normal topic How to get the L1, L2, and LLC miss rates from a Xeon 5140
by Guillermo Navarro
Thu, 05/31/2012 - 19:15 0
by Guillermo Navarro
Thu, 05/31/2012 - 19:15
Normal topic Intel PCM V2.10 on El Capitan
by Brian V.
Fri, 05/06/2016 - 14:08 0
by Brian V.
Fri, 05/06/2016 - 14:08
Normal topic Problems with Top-down Microarchitecture Analysis Method
by Xueqi L.
Thu, 01/28/2016 - 05:57 0
by Xueqi L.
Thu, 01/28/2016 - 05:57
Normal topic EET on Broadwell-EP
by Johannes Hofmann
Wed, 10/05/2016 - 23:31 0
by Johannes Hofmann
Wed, 10/05/2016 - 23:31
Normal topic Intel DDU and MDT 2013
by Krzysztof T.
Mon, 04/10/2017 - 07:39 0
by Krzysztof T.
Mon, 04/10/2017 - 07:39
Normal topic Setting overflow flags in IA32_PERF_GLOBAL_STATUS register
by Ilya Verbin
Thu, 12/01/2016 - 15:17 0
by Ilya Verbin
Thu, 12/01/2016 - 15:17
Normal topic BACLEAR and BPUCLEAR
by perfwise
Thu, 02/21/2013 - 12:04 0
by perfwise
Thu, 02/21/2013 - 12:04
Normal topic Xcode warning when building PcmMsrDriver.kext
by Charles S.
Thu, 07/28/2016 - 15:23 0
by Charles S.
Thu, 07/28/2016 - 15:23
Normal topic GPU (Intel HD Graphics) hardware counters
by Sankaralingam P.
Thu, 02/18/2016 - 22:42 0
by Sankaralingam P.
Thu, 02/18/2016 - 22:42
Normal topic microcode processor update: what processors are supported and what version is inside update?
by Peter V.
Mon, 07/06/2015 - 08:30 0
by Peter V.
Mon, 07/06/2015 - 08:30
Normal topic (Potential) PCM v2.9 CSV output bug
by Ameen A.
Fri, 09/18/2015 - 18:03 0
by Ameen A.
Fri, 09/18/2015 - 18:03
Normal topic About PCM2.10 new feature
by zhihong l.
Mon, 01/04/2016 - 23:33 0
by zhihong l.
Mon, 01/04/2016 - 23:33
Normal topic sys_reset# use with Intel® 5 Series HM55 chipset and an embedded COM Express™ Intel® Core™ i7 Celeron processor
by Lior M.
Sun, 09/28/2014 - 02:26 0
by Lior M.
Sun, 09/28/2014 - 02:26
Normal topic Monitoring Intel platforms with WBEM/CIM, SNMP
by Thor T.
Fri, 03/21/2014 - 01:58 0
by Thor T.
Fri, 03/21/2014 - 01:58
Normal topic AVX Turbo bins for Broadwell-EP
by Johannes Hofmann
Tue, 09/06/2016 - 02:06 0
by Johannes Hofmann
Tue, 09/06/2016 - 02:06
Normal topic About "Non-zero PCI group segments are not supported in PCM/Windows"
by zhihong l.
Wed, 11/09/2016 - 00:34 0
by zhihong l.
Wed, 11/09/2016 - 00:34
Normal topic MD5 optimization to support Amazon s3 integrity check generation
by Rob B.
Mon, 10/19/2015 - 08:39 0
by Rob B.
Mon, 10/19/2015 - 08:39
Normal topic Data linear address does not appear with PEBS sampling in some architectures
by jang, jaeyoung
Fri, 06/10/2016 - 00:18 0
by jang, jaeyoung
Fri, 06/10/2016 - 00:18
New posts
No new posts
Hot topic with new posts
Hot topic without new posts
Sticky topic
Locked topic
For more complete information about compiler optimizations, see our Optimization Notice.