Intel® Developer Zone:
Software Tuning, Performance Optimization & Platform Monitoring

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Discussion around topics such as monitoring and software tuning methodologies, Performance Monitoring Unit (PMU) of Intel microprocessors, software characterization, software optimization techniques for performance and power/energy, monitoring CPU core and graphics processors and other system coprocessors as well asimmerging runtime usages for software metering and quality of service.
This is a peer forum for developers using Intel® technology. Response times vary depending on the complexity of your issue.
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Topic / Topic starter Post date Replies Last Postsort ascending
Normal topic Intel - Power Gadget
by Umberto M.
Thu, 05/25/2017 - 03:12 1
by Mike Yi (Intel)
Tue, 06/13/2017 - 11:17
Normal topic Programming PEBS Counters
by Arnabjyoti K.
Sat, 05/27/2017 - 09:17 2
by Arnabjyoti K.
Thu, 06/01/2017 - 14:13
Normal topic doubt about MFENCE instruction
by Mahesh C.
Thu, 05/18/2017 - 06:31 3
by McCalpin, John
Thu, 05/25/2017 - 08:34
Normal topic Unexpected Branch Counting output
by Gregory
Wed, 05/17/2017 - 14:16 9
by Gregory
Sat, 05/20/2017 - 15:40
Hot topic Capturing multiple events simultaneously using RDPMC instruction
by Zirak
Thu, 02/16/2017 - 08:47 15
by Travis D.
Sat, 05/20/2017 - 14:23
Normal topic Haswell PMU HW doesn't support sampling/overflow-interrupts (LBR)???
by Mark D.
Thu, 05/18/2017 - 10:17 0
by Mark D.
Thu, 05/18/2017 - 10:17
Normal topic Reading IMC uncore counters, surprising output
by Jordi V.
Fri, 05/12/2017 - 01:20 3
by McCalpin, John
Wed, 05/17/2017 - 08:43
Normal topic Reading programmable and fixed-function performance counters
by Davidson F.
Mon, 01/02/2017 - 18:12 11
by Davidson F.
Wed, 05/10/2017 - 17:41
Normal topic Counting Cache miss
by Ajit S.
Mon, 05/01/2017 - 23:55 4
by Travis D.
Wed, 05/10/2017 - 16:37
Normal topic why offcore is not support?
by Ying W.
Tue, 05/02/2017 - 18:01 2
by Ying W.
Sun, 05/07/2017 - 23:19
Normal topic Calculating memory stalls in second level cache
by Papote J.
Sun, 05/07/2017 - 13:25 0
by Papote J.
Sun, 05/07/2017 - 13:25
Hot topic Can someone explain how NUMA is not always best for multi-socket systems?
by hardware_guy
Mon, 05/13/2013 - 13:13 21
by Tim P.
Sun, 05/07/2017 - 11:24
Normal topic Multiplexing PMU counter
by cosmin m.
Sun, 05/07/2017 - 03:42 0
by cosmin m.
Sun, 05/07/2017 - 03:42
Normal topic It is possible to monitor cross-processes using RDTSC or RDTSCP?
by Zirak
Thu, 02/16/2017 - 13:37 2
by Zirak
Sat, 05/06/2017 - 18:08
Normal topic Imaging Unit / Gaussian Mixture Model (GMM) Device
by frankie f.
Thu, 05/04/2017 - 08:11 0
by frankie f.
Thu, 05/04/2017 - 08:11
Normal topic Errors while using Intel PCM
by Gargi A.
Mon, 05/01/2017 - 02:26 0
by Gargi A.
Mon, 05/01/2017 - 02:26
Normal topic iMC Configuration Registers reads all 1 (ffffffff)
by Xingbo W.
Mon, 09/05/2016 - 15:16 4
by McCalpin, John
Fri, 04/28/2017 - 11:59
Normal topic Throttling memory bandwidth via iMC on Intel(R) Xeon(R) CPU E5-2650 v3
by Wei C.
Thu, 04/27/2017 - 17:17 0
by Wei C.
Thu, 04/27/2017 - 17:17
Normal topic Does disabling H/W prefetching affect prefetch/prefetchw instructions?
by Ming-Wei S.
Sun, 04/23/2017 - 15:19 2
by Tim P.
Wed, 04/26/2017 - 10:09
Normal topic MSR_CORE_PERF_LIMIT_REASONS Set
by Ian S.
Sun, 04/16/2017 - 08:21 1
by McCalpin, John
Wed, 04/26/2017 - 09:16
Normal topic openGL 3.3
by Arnold W.
Thu, 04/20/2017 - 09:47 4
by gaston-hillar
Sun, 04/23/2017 - 21:18
Normal topic Cache Allocation Technology - Current specs (allocation granularity, number of CLOS)
by Chang Hyun P.
Thu, 06/04/2015 - 01:35 5
by Andrew H. (Intel)
Fri, 04/21/2017 - 14:22
Normal topic Get Very Low Performance with MP Linpack benchmark in HPC cluster
by Minh C.
Mon, 02/20/2017 - 20:26 1
by Black.S
Fri, 04/21/2017 - 12:29
Normal topic Access to Processor Counter Monitor has denied
by Matias C.
Thu, 04/20/2017 - 05:18 2
by gaston-hillar
Thu, 04/20/2017 - 20:46
Normal topic How to recognize wthat a applications exacting to latency ?
by Black.S
Sat, 04/01/2017 - 01:51 4
by Black.S
Thu, 04/20/2017 - 10:42
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For more complete information about compiler optimizations, see our Optimization Notice.