Intel® Developer Zone:
Software Tuning, Performance Optimization & Platform Monitoring

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Discussion around topics such as monitoring and software tuning methodologies, Performance Monitoring Unit (PMU) of Intel microprocessors, software characterization, software optimization techniques for performance and power/energy, monitoring CPU core and graphics processors and other system coprocessors as well asimmerging runtime usages for software metering and quality of service.
Intel monitors this forum Monday – Friday, 09:00 – 17:00 Pacific Time (GMT –7:00). Depending on the amount of research we need to do to track down the answer, it may take a day or two for us to respond.
Topic / Topic starter Post datesort descending Replies Last Post
Normal topic Reading the nominal CPU frequency on Linux
by Michael G.
Tue, 09/18/2012 - 07:37 3
by John McCalpin
Tue, 09/25/2012 - 10:35
Normal topic Power limit registers in Sandy bridge
by Sankaralingam P.
Tue, 09/18/2012 - 10:47 6
by Sankaralingam P.
Wed, 09/26/2012 - 12:23
Normal topic Very low L3 cache hits on Sandy Bridge according to PCM
by matt_garman
Thu, 09/20/2012 - 09:03 14
by matt_garman
Mon, 09/30/2013 - 07:36
Normal topic utility similar to Perf stat in old linux kernals e.g. 2.6.18
by Rupinder V.
Thu, 09/20/2012 - 23:02 4
by Roman Dementiev...
Wed, 09/26/2012 - 06:50
Normal topic PCM for WBINVD instruction
by madhumind
Fri, 09/21/2012 - 03:00 0
by madhumind
Fri, 09/21/2012 - 03:00
Normal topic LLC misses in Sandy Bridge NUMA hosts
by Tan L.
Fri, 09/21/2012 - 19:39 6
by Roman Dementiev...
Mon, 10/01/2012 - 03:23
Normal topic Core i5 2nd Generation (Sandy Bridge) - Disable only cache L2/L3
by Ciro V.
Sun, 09/23/2012 - 02:56 0
by Ciro V.
Sun, 09/23/2012 - 02:56
Normal topic Xeon E5-2600 uncore PCU event confusion
by John McCalpin
Tue, 09/25/2012 - 12:20 3
by John McCalpin
Mon, 10/01/2012 - 09:01
Normal topic Intel PCM - Processor not supported
by Rupinder V.
Tue, 09/25/2012 - 23:04 6
by Rupinder V.
Wed, 09/26/2012 - 08:19
Normal topic How to invalidate cache with EPT after modifying memory?
by steven765
Wed, 09/26/2012 - 08:15 0
by steven765
Wed, 09/26/2012 - 08:15
Normal topic write only memory bandwidth
by zachary w.
Thu, 09/27/2012 - 23:38 10
by John McCalpin
Wed, 10/17/2012 - 11:08
Normal topic Is stall cycles all for memory access?
by Shouvik B.
Mon, 10/01/2012 - 17:20 3
by Shouvik B.
Thu, 10/04/2012 - 16:52
Normal topic PCM with Fortran
by Rafael Silva
Wed, 10/03/2012 - 07:47 1
by Thomas Willhalm...
Fri, 10/05/2012 - 02:40
Normal topic small mistakes in Xeon E5-2600 uncore performance monitoring guide
by John McCalpin
Wed, 10/03/2012 - 09:34 1
by Roman Dementiev...
Thu, 10/04/2012 - 05:25
Normal topic SB/IV throughput difference of 2x for same test of vpxor
by perfwise
Wed, 10/10/2012 - 06:22 1
by Shih Kuo (Intel)
Mon, 11/12/2012 - 17:00
Normal topic PCM: Unsupported processor error
by Joe Mario
Wed, 10/10/2012 - 11:57 6
by Roman Dementiev...
Tue, 12/23/2014 - 00:43
Normal topic Formatting Raw Events for Perf...
by Shouvik B.
Sat, 10/13/2012 - 14:50 0
by Shouvik B.
Sat, 10/13/2012 - 14:50
Normal topic Reading QPI Routing Table
by robchip
Sun, 10/14/2012 - 03:07 9
by iliyapolak
Fri, 05/10/2013 - 05:36
Normal topic Accessing Uncore performance counters
by Priyadarshi
Fri, 10/19/2012 - 14:44 6
by iliyapolak
Tue, 12/25/2012 - 13:37
Normal topic Performance Monitoring Event tables
by Michael G.
Sat, 10/20/2012 - 14:50 1
by Shih Kuo (Intel)
Mon, 11/12/2012 - 16:27
Normal topic Sandy\Ivy Bridge memory traffic
by Max R.
Mon, 10/22/2012 - 03:38 9
by Max R.
Wed, 12/19/2012 - 06:28
Normal topic E6xx
by Stijn D.
Mon, 10/22/2012 - 09:25 5
by Gael Hofemeier ...
Tue, 10/23/2012 - 08:41
Normal topic TLB, large pages and prefetching
by cagribal
Tue, 10/30/2012 - 06:55 9
by John McCalpin
Fri, 10/09/2015 - 15:43
Normal topic Xeon E5 L3 cache is organized how?
by Zack -.
Tue, 10/30/2012 - 09:26 7
by andres-more (Intel)
Mon, 11/05/2012 - 05:00
Normal topic RAPL MSR Interface
by Kenan L.
Tue, 10/30/2012 - 10:41 1
by Roman Dementiev...
Tue, 10/30/2012 - 14:36
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Hot topic with new posts
Hot topic without new posts
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For more complete information about compiler optimizations, see our Optimization Notice.