Intel® Developer Zone:
Software Tuning, Performance Optimization & Platform Monitoring

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Discussion around topics such as monitoring and software tuning methodologies, Performance Monitoring Unit (PMU) of Intel microprocessors, software characterization, software optimization techniques for performance and power/energy, monitoring CPU core and graphics processors and other system coprocessors as well asimmerging runtime usages for software metering and quality of service.
Topic / Topic starter Post date Repliessort ascending Last Post
Normal topic Using Performance Counter To Measure various parameters in External Program
by Prasanna Subburaj
Mon, 04/20/2015 - 14:49 4
by Prasanna Subburaj
Sat, 05/02/2015 - 14:41
Normal topic What is a default precision for a 64-bit platform with AMD CPU?
by Sergey Kostrov
Mon, 06/11/2012 - 21:46 4
by Sergey Kostrov
Wed, 06/13/2012 - 18:04
Normal topic OFFCORE_RSP_1 always gives zero count of uncore events
by Jithin Parayil T.
Wed, 02/04/2015 - 22:30 4
by Jithin Parayil T.
Thu, 02/05/2015 - 15:03
Normal topic Intel PCM - How To on Windows
by pranith
Fri, 03/09/2012 - 14:15 4
by admin
Thu, 03/22/2012 - 05:21
Normal topic Change the cpu frequency
by Ayam
Mon, 05/12/2014 - 10:07 4
by Black.S
Tue, 05/13/2014 - 09:05
Normal topic Intel fast number generator isn't works as expected
by Pavel K.
Sat, 02/15/2014 - 13:42 4
by Patrick Fay (Intel)
Wed, 02/19/2014 - 04:28
Normal topic Intel ATOM SSE3_ATOM optimization under Windows 32-bit -O3
by Filip Rydlo
Wed, 11/09/2011 - 07:19 4
by Sergey Kostrov
Wed, 11/09/2011 - 07:19
Normal topic PMU Events for Ivy Bridge
by Divino C.
Mon, 09/02/2013 - 14:25 4
by Divino C.
Tue, 09/03/2013 - 10:54
Normal topic PCM: Faster way to query MSR on OS/X
by Gilbert C.
Sun, 09/07/2014 - 19:03 4
by Gilbert C.
Fri, 09/12/2014 - 21:40
Normal topic Vid and Fid control, from Core 2 to Haswell
by benoit.leveugle
Wed, 08/07/2013 - 05:20 4
by Patrick Fay (Intel)
Wed, 08/07/2013 - 08:06
Normal topic Problem in aligning Fortran arrays in simple code example
by CK
Tue, 01/27/2015 - 05:55 4
by CK
Wed, 01/28/2015 - 06:09
Normal topic Setting MSR 0x1AD (turbo ratio limits) has no effect on Sandy Bridge
by khenglish
Tue, 09/06/2011 - 09:32 4
by terabytes
Sun, 01/01/2012 - 23:40
Normal topic Volume render
by raytheon
Wed, 01/11/2012 - 18:36 4
by jan v.
Sun, 02/09/2014 - 04:58
Normal topic Intel RAPL's effect on individual cores
by Mustafa K.
Thu, 10/02/2014 - 00:22 4
by iliyapolak
Sat, 10/04/2014 - 01:30
Normal topic Cache Enabled/Disabled?
by heinerj
Fri, 04/27/2012 - 08:40 4
by rahim25
Thu, 05/10/2012 - 10:40
Normal topic Dynamic Voltage Scaling in Haswell/Intel processors
by Mohammad Ashraf...
Thu, 02/06/2014 - 16:58 4
by Patrick Fay (Intel)
Tue, 02/11/2014 - 18:59
Normal topic Calculation of DRAM Power using MSR
by Pramodkumar P.
Thu, 04/09/2015 - 00:09 4
by Pramodkumar P.
Fri, 04/10/2015 - 06:49
Normal topic configuring "unganged memory" in sandybridge
by balu.r.0212
Mon, 05/14/2012 - 03:58 4
by joe-griffin
Tue, 05/15/2012 - 06:54
Normal topic Intel® Memory Latency Checker v2 with buffer option
by Steffen Zeuch
Wed, 03/04/2015 - 06:45 4
by Steffen Zeuch
Thu, 03/05/2015 - 06:06
Normal topic Using PCM API. No authority to
by Kyungjoo K.
Mon, 02/25/2013 - 18:49 4
by Patrick Fay (Intel)
Tue, 02/26/2013 - 09:28
Normal topic Have a beeping problem with new ram memory.
by pinger d.
Sun, 03/30/2014 - 13:19 4
by iliyapolak
Mon, 03/31/2014 - 06:22
Normal topic verifying first-touch memory allocation
by Tim Prince
Fri, 06/14/2013 - 10:26 4
by John D. McCalpin
Mon, 06/24/2013 - 12:34
Normal topic Single stepping on branches, exception or interrupts.
by stott1
Fri, 02/10/2012 - 23:56 4
by stott1
Fri, 02/10/2012 - 23:56
Normal topic Sample code for PCIe Burst Transfer white paper by Intel?
by Sonny G.
Fri, 03/20/2015 - 19:48 4
by Sonny G.
Fri, 03/27/2015 - 11:47
Normal topic Memory Buffers
by maratyszcza
Sat, 09/10/2011 - 18:16 4
by Tim Prince
Sat, 09/10/2011 - 18:16
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For more complete information about compiler optimizations, see our Optimization Notice.