Intel® Developer Zone:
Software Tuning, Performance Optimization & Platform Monitoring

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Discussion around topics such as monitoring and software tuning methodologies, Performance Monitoring Unit (PMU) of Intel microprocessors, software characterization, software optimization techniques for performance and power/energy, monitoring CPU core and graphics processors and other system coprocessors as well asimmerging runtime usages for software metering and quality of service.
Topic / Topic starter Post datesort descending Replies Last Post
Normal topic Using Result from remote Xeon Phi machine to local machine to visualize it
by Allam F.
Mon, 10/14/2013 - 08:52 0
by Allam F.
Mon, 10/14/2013 - 08:52
Normal topic How 32 bytes alignment affect uop cache?
by Wei M.
Wed, 10/16/2013 - 15:35 6
by iliyapolak
Thu, 10/17/2013 - 10:50
Normal topic Average number of uops per instruction
by Ganesh P
Thu, 10/17/2013 - 19:50 6
by Patrick Fay (Intel)
Fri, 01/24/2014 - 08:29
Normal topic Single Threaded Memory Bandwidth on Sandy Bridge
by Nathan K.
Fri, 10/18/2013 - 04:38 14
by QIAOMIN Q. (Intel)
Tue, 11/05/2013 - 20:22
Normal topic Impact disabling hyperthreading in linux
by Black.S
Fri, 10/18/2013 - 05:40 11
by Black.S
Fri, 10/18/2013 - 20:14
Normal topic where to find Uncore Performance Analysis Guide for westmere-ex Xeon MP
by Black.S
Fri, 10/18/2013 - 11:44 3
by Black.S
Fri, 10/18/2013 - 21:16
Normal topic Access Contention Analysis
by Divino C.
Thu, 10/24/2013 - 13:12 3
by iliyapolak
Fri, 10/25/2013 - 06:39
Normal topic Cache Coherence in Ivy Bridge
by Divino C.
Thu, 10/24/2013 - 13:15 10
by iliyapolak
Mon, 10/28/2013 - 00:22
Normal topic Getting start with PCM
by Tommy C.
Sun, 10/27/2013 - 06:11 4
by Roman Dementiev...
Tue, 10/29/2013 - 01:37
Normal topic Clarification: Sandy Bridge Load Latency
by Nathan K.
Mon, 10/28/2013 - 15:29 1
by Patrick Fay (Intel)
Fri, 01/24/2014 - 08:36
Normal topic Question about measurements provided by PCM
by Michael J.
Wed, 10/30/2013 - 09:50 0
by Michael J.
Wed, 10/30/2013 - 09:50
Normal topic [BUG][AVX] Invalid code generation using _mm256_unpacklo_pd and _mm256_permute2f128_pd
This topic has been moved to "Intel® C++ Compiler" (View topic)
Normal topic DRAM Self-Refresh
by Saptarshi S.
Fri, 11/01/2013 - 17:50 2
by iliyapolak
Tue, 11/05/2013 - 22:38
Normal topic Load Latency PEBS
by Mohamed Husain
Sun, 11/03/2013 - 22:36 1
by iliyapolak
Sun, 11/03/2013 - 23:51
Normal topic Intel Performance Counter Monitor (Intel PCM) 2.6 released
by Thomas Willhalm...
Thu, 11/07/2013 - 05:09 2
by Jaeyoon C.
Thu, 11/07/2013 - 22:06
Normal topic vector nontemporal in Fortran
by Rafael Silva
Thu, 11/07/2013 - 11:54 3
by Rafael Silva
Fri, 11/08/2013 - 04:47
Hot topic Voltage levels at different frequency levels on Sandy bridge processor
by Rajiv N.
Sun, 11/10/2013 - 01:22 29
by iliyapolak
Fri, 11/15/2013 - 04:21
Normal topic intel vtune errors
by kiran s.
Tue, 11/12/2013 - 01:46 1
by Patrick Fay (Intel)
Tue, 11/12/2013 - 09:40
Hot topic function prolugue consumes many cycles
by developer
Mon, 11/18/2013 - 08:18 17
by Sergey Kostrov
Wed, 11/20/2013 - 21:45
Normal topic Data Linear Address Tracing - Counter Reset Endless Loop
by Tobias N.
Mon, 11/18/2013 - 08:24 6
by Patrick Fay (Intel)
Fri, 01/24/2014 - 07:45
Normal topic Overwrite Locked Bits in a Memory Controller
by Saptarshi S.
Mon, 11/18/2013 - 16:34 2
by Patrick Fay (Intel)
Fri, 01/24/2014 - 07:53
Normal topic Can I monitor process using PCM
by Chandrashekhar G.
Tue, 11/19/2013 - 17:08 8
by Patrick Fay (Intel)
Fri, 01/24/2014 - 06:35
Normal topic Is it possible to use RAPL interfaces on Xeon E3 1200 (v2, v3) processors?
by jaeyoung j.
Thu, 11/21/2013 - 02:20 1
by Patrick Fay (Intel)
Thu, 11/21/2013 - 07:37
Normal topic How to find the reason for poor scalability in xeon phi?
by Surya Narayanan N.
Thu, 11/21/2013 - 10:08 7
by Black.S
Fri, 12/06/2013 - 20:57
Normal topic level 2 and 3 cache misses on Xeon E5
by george g.
Wed, 11/27/2013 - 02:02 5
by Morten C.
Thu, 04/03/2014 - 00:04
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Hot topic without new posts
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For more complete information about compiler optimizations, see our Optimization Notice.