Intel® Developer Zone:
Software Tuning, Performance Optimization & Platform Monitoring

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Discussion around topics such as monitoring and software tuning methodologies, Performance Monitoring Unit (PMU) of Intel microprocessors, software characterization, software optimization techniques for performance and power/energy, monitoring CPU core and graphics processors and other system coprocessors as well asimmerging runtime usages for software metering and quality of service.
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Topic / Topic starter Post date Repliessort descending Last Post
Normal topic SSE vs AVX, kinda deceived
by gol
Sat, 05/05/2012 - 09:19 2
by gol
Tue, 05/08/2012 - 20:46
Normal topic Do intel cpus have options to speed up ipc ?
by Jog L.
Wed, 02/25/2015 - 08:05 2
by iliyapolak
Thu, 02/26/2015 - 22:37
Normal topic What are LLC hardware prefetches?
by perfwise
Wed, 12/07/2011 - 12:31 2
by Patrick Fay (Intel)
Wed, 12/07/2011 - 12:31
Normal topic Tsc-deadline feature. Cpu family ?
by Jog L.
Wed, 06/03/2015 - 23:03 2
by Jog L.
Thu, 06/04/2015 - 06:41
Normal topic STREAM copy bandwidth
by Paul S.
Tue, 08/09/2016 - 11:22 2
by Paul S.
Thu, 08/11/2016 - 08:58
Normal topic Collect TOR_INSERTS.OPCODE for two opcodes simultaneously
by Alexander Alexeev
Thu, 05/30/2013 - 02:24 2
by Roman Dementiev...
Fri, 06/07/2013 - 01:14
Normal topic Profiling With Intel VTune Amplifier
by Divino C.
Thu, 08/08/2013 - 09:50 2
by Divino C.
Thu, 08/08/2013 - 14:24
Normal topic Performance monitoring through intel VTune amplifier
by Saumya B.
Tue, 09/13/2016 - 01:27 2
by Saumya B.
Thu, 09/15/2016 - 13:50
Normal topic [PCM] Support Gflops?
by GHui
Fri, 08/28/2015 - 01:32 2
by McCalpin, John
Fri, 08/28/2015 - 08:41
Normal topic Haswell loop alignment vs. unrolling
by Tim P.
Wed, 09/09/2015 - 05:49 2
by Tim P.
Wed, 09/16/2015 - 12:08
Normal topic Run to Run variability on an Intel(R) Xeon(R) CPU E3-1240 v3
by Animesh J.
Fri, 02/27/2015 - 23:43 2
by McCalpin, John
Tue, 03/17/2015 - 08:50
Normal topic mmap doesn't return page size aligned address when mmap 1st param is zero
by Karen M.
Mon, 07/20/2015 - 11:18 2
by CyrIng
Sat, 07/25/2015 - 17:20
Normal topic NUMA options in BIOS
by george g.
Thu, 06/04/2015 - 07:16 2
by Matthias F.
Tue, 01/24/2017 - 05:42
Normal topic High number of retired instructions
by Tomer M.
Tue, 04/12/2016 - 06:45 2
by Tomer M.
Tue, 04/12/2016 - 07:09
Normal topic Offcore_response counters and writebacks
by Milan R.
Sun, 01/22/2017 - 11:28 2
by Milan R.
Tue, 01/24/2017 - 07:54
Normal topic PCM conflict with VTune
by Ildar A.
Sun, 10/12/2014 - 15:47 2
by Thomas Willhalm...
Mon, 11/10/2014 - 01:52
Normal topic why offcore is not support?
by Ying W.
Tue, 05/02/2017 - 18:01 2
by Ying W.
Sun, 05/07/2017 - 23:19
Normal topic Questiona about Instructions Retired in PMU
by Arthur L.
Fri, 09/27/2013 - 07:06 2
by iliyapolak
Mon, 09/30/2013 - 23:27
Normal topic macOS .kext signing for performance counters
by Aaron H.
Thu, 11/24/2016 - 10:20 2
by Chris S.
Fri, 03/31/2017 - 21:03
Normal topic TLB misses
by cagribal
Wed, 03/07/2012 - 03:30 3
by Patrick Fay (Intel)
Wed, 03/07/2012 - 03:30
Normal topic Package C-state Residency Counters
by CyrIng
Tue, 02/21/2017 - 09:51 3
by McCalpin, John
Mon, 07/10/2017 - 06:04
Normal topic Linux vs. Windows: package C-state residency over Haswell
by Rony R.
Sun, 11/09/2014 - 03:59 3
by Patrick Fay (Intel)
Sun, 04/26/2015 - 09:45
Normal topic Counting number of uops
by Ayaz A.
Wed, 02/22/2017 - 10:19 3
by McCalpin, John
Fri, 02/24/2017 - 08:51
Normal topic Evaluating dfferent software prefetch schemes SandyBridge and later processors
by andy-nisbet
Wed, 07/25/2012 - 10:13 3
by McCalpin, John
Tue, 09/25/2012 - 15:53
Normal topic Sandy Bridge i5-2500k uncore ARB events
by Ying Y.
Tue, 03/08/2016 - 08:58 3
by A T. (Intel)
Mon, 03/21/2016 - 09:27
New posts
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Hot topic with new posts
Hot topic without new posts
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For more complete information about compiler optimizations, see our Optimization Notice.