Intel® Developer Zone:
Software Tuning, Performance Optimization & Platform Monitoring

Announcements
 
Discussion around topics such as monitoring and software tuning methodologies, Performance Monitoring Unit (PMU) of Intel microprocessors, software characterization, software optimization techniques for performance and power/energy, monitoring CPU core and graphics processors and other system coprocessors as well asimmerging runtime usages for software metering and quality of service.
 
RSS
Login to post new content in forum.
Topic / Topic starter Post datesort descending Replies Last Post
Normal topic How to distinguish between partial and complete cache reads.
by Rakhi H. 		Sun, 09/29/2013 - 23:12 3
 by Rakhi H.
Thu, 10/10/2013 - 23:51
Normal topic Docs on Memory Controller PCI Configuration Space
by Wei W. 		Mon, 10/07/2013 - 13:10 10
 by iliyapolak
Thu, 10/10/2013 - 09:05
Normal topic [PCM] Adding extra events "MEM_LOAD_UOPS_LLC_MISS_RETIRED.LOCAL_DRAM" and "MEM_LOAD_UOPS_LLC_MISS_RETIRED.REMOTE_DRAM"
by Ron C. 		Wed, 10/09/2013 - 14:22 11
 by Roman Dementiev...
Tue, 10/22/2013 - 04:28
Normal topic How to count stalls in MIC using vtune
by Allam F. 		Wed, 10/09/2013 - 14:52 0
 by Allam F.
Wed, 10/09/2013 - 14:52
Normal topic Problems in Analyzing Result in Vtune GUI
by Ishani A. 		Fri, 10/11/2013 - 03:17 1
 by iliyapolak
Fri, 10/11/2013 - 05:57
Normal topic I need a document to describe vtune Events for Sandy Bridge
by Allam F. 		Fri, 10/11/2013 - 16:27 2
 by Allam F.
Sat, 10/12/2013 - 14:24
Normal topic Using Result from remote Xeon Phi machine to local machine to visualize it
by Allam F. 		Mon, 10/14/2013 - 08:52 0
 by Allam F.
Mon, 10/14/2013 - 08:52
Normal topic How 32 bytes alignment affect uop cache?
by Wei M. 		Wed, 10/16/2013 - 15:35 6
 by iliyapolak
Thu, 10/17/2013 - 10:50
Normal topic Average number of uops per instruction
by Ganesh P 		Thu, 10/17/2013 - 19:50 6
 by Patrick Fay (Intel)
Fri, 01/24/2014 - 08:29
Normal topic Single Threaded Memory Bandwidth on Sandy Bridge
by Nathan K. 		Fri, 10/18/2013 - 04:38 14
 by QIAOMIN Q. (Intel)
Tue, 11/05/2013 - 20:22
Normal topic Impact disabling hyperthreading in linux
by Black.S 		Fri, 10/18/2013 - 05:40 11
 by Black.S
Fri, 10/18/2013 - 20:14
Normal topic where to find Uncore Performance Analysis Guide for westmere-ex Xeon MP
by Black.S 		Fri, 10/18/2013 - 11:44 3
 by Black.S
Fri, 10/18/2013 - 21:16
Normal topic Access Contention Analysis
by Divino C. 		Thu, 10/24/2013 - 13:12 3
 by iliyapolak
Fri, 10/25/2013 - 06:39
Normal topic Cache Coherence in Ivy Bridge
by Divino C. 		Thu, 10/24/2013 - 13:15 10
 by iliyapolak
Mon, 10/28/2013 - 00:22
Normal topic Getting start with PCM
by Tommy C. 		Sun, 10/27/2013 - 06:11 4
 by Roman Dementiev...
Tue, 10/29/2013 - 01:37
Normal topic Clarification: Sandy Bridge Load Latency
by Nathan K. 		Mon, 10/28/2013 - 15:29 1
 by Patrick Fay (Intel)
Fri, 01/24/2014 - 08:36
Normal topic Question about measurements provided by PCM
by Michael J. 		Wed, 10/30/2013 - 09:50 0
 by Michael J.
Wed, 10/30/2013 - 09:50
Normal topic [BUG][AVX] Invalid code generation using _mm256_unpacklo_pd and _mm256_permute2f128_pd
This topic has been moved to "Intel® C++ Compiler" (View topic)
Normal topic DRAM Self-Refresh
by Saptarshi S. 		Fri, 11/01/2013 - 17:50 2
 by iliyapolak
Tue, 11/05/2013 - 22:38
Normal topic Load Latency PEBS
by Mohamed Husain 		Sun, 11/03/2013 - 22:36 1
 by iliyapolak
Sun, 11/03/2013 - 23:51
Login to post new content in forum.
New posts
No new posts
Hot topic with new posts
Hot topic without new posts
Sticky topic
Locked topic
For more complete information about compiler optimizations, see our Optimization Notice.