Intel® Developer Zone:
Software Tuning, Performance Optimization & Platform Monitoring

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Discussion around topics such as monitoring and software tuning methodologies, Performance Monitoring Unit (PMU) of Intel microprocessors, software characterization, software optimization techniques for performance and power/energy, monitoring CPU core and graphics processors and other system coprocessors as well asimmerging runtime usages for software metering and quality of service.
This is a peer forum for developers using Intel® technology. Response times vary depending on the complexity of your issue.
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Topic / Topic startersort ascending Post date Replies Last Post
Normal topic what is the control register address for setting DVFS values
by Nanda K.
Sun, 12/08/2013 - 13:07 1
by gokussj9
Sun, 12/08/2013 - 15:07
Normal topic What is the C0-C7 core meaning?
by li y.
Mon, 10/17/2016 - 02:48 1
by McCalpin, John
Mon, 10/17/2016 - 08:40
Normal topic What is PCICFG address in uncore of intel XEON?
by Zhu G.
Thu, 11/06/2014 - 00:27 3
by Zhu G.
Sun, 11/09/2014 - 17:01
Normal topic What is int8 and FP16?
by GHui
Wed, 06/14/2017 - 03:24 4
by McCalpin, John
Wed, 06/21/2017 - 08:01
Normal topic What is different between these AVX events on v3?
by GHui
Wed, 09/21/2016 - 19:45 1
by Thomas R.
Fri, 09/23/2016 - 06:17
Normal topic What is a default precision for a 64-bit platform with AMD CPU?
by Sergey Kostrov
Mon, 06/11/2012 - 21:46 4
by Sergey Kostrov
Wed, 06/13/2012 - 18:04
Normal topic What happens if DAZ bit is set but isn't supported?
by Rich Skorski
Wed, 12/12/2012 - 07:51 2
by Rich Skorski
Fri, 12/14/2012 - 09:30
Normal topic what FPU pipe does VBROADCASTSD go down?
by perfwise
Thu, 04/05/2012 - 07:30 4
by iliyapolak
Tue, 02/12/2013 - 07:32
Normal topic What does CYCLES_NO_DISPATCH do on Sandy Bridge?
by Karl W.
Thu, 02/06/2014 - 09:44 4
by Karl W.
Tue, 02/11/2014 - 08:31
Normal topic What do L2_RQSTS.PF_HIT and L2_RQSTS.PF_MISS count and entail?
by Jos E.
Thu, 01/09/2014 - 08:13 1
by McCalpin, John
Tue, 01/21/2014 - 16:10
Normal topic What causes the retired instructions to increase?
by Shiv_Inside
Fri, 04/11/2014 - 12:32 1
by Shiv_Inside
Fri, 04/11/2014 - 19:59
Normal topic What are REMOTE_CACHE_FWD offcore response events ?
by Manuel S.
Mon, 02/10/2014 - 12:44 1
by Manuel S.
Tue, 02/18/2014 - 06:41
Normal topic What are LLC hardware prefetches?
by perfwise
Wed, 12/07/2011 - 12:31 2
by Patrick Fay (Intel)
Wed, 12/07/2011 - 12:31
Normal topic Westmere EX clock half speed
by Curtis Walker
Wed, 04/11/2012 - 11:34 1
by Roman Dementiev...
Wed, 04/11/2012 - 11:34
Normal topic Weird Derived Cache Latency
by Min X.
Mon, 03/27/2017 - 20:15 1
by Thomas Willhalm...
Tue, 03/28/2017 - 02:16
Normal topic Weird CPU usage between x5560 and x5660 systems
by sridhar.basam
Wed, 02/01/2012 - 11:42 14
by Patrick Fay (Intel)
Wed, 02/01/2012 - 11:44
Normal topic WB vs WC memory type
by cianfa72
Tue, 10/13/2015 - 05:20 1
by McCalpin, John
Tue, 10/13/2015 - 12:35
Normal topic Want to count L2 data cache misses without prefetching
by Wei W.
Thu, 06/02/2016 - 13:19 1
by Tim P.
Thu, 06/02/2016 - 14:13
Normal topic Vtune Strange Counters
by Rafael Silva
Thu, 06/28/2012 - 14:40 7
by Rafael Silva
Sat, 06/30/2012 - 15:34
Normal topic vtune can not get the call stack
by Wang Ruifeng
Mon, 09/09/2013 - 20:59 2
by Patrick Fay (Intel)
Tue, 09/10/2013 - 08:44
Normal topic Volume render
by raytheon
Wed, 01/11/2012 - 18:36 4
by jan v.
Sun, 02/09/2014 - 04:58
Normal topic Voltage Regulator Test Tool (VRTT) Software Issues
by Brydon Murray
Mon, 06/11/2012 - 11:52 2
by Brydon Murray
Mon, 06/11/2012 - 15:30
Hot topic Voltage levels at different frequency levels on Sandy bridge processor
by Rajiv N.
Sun, 11/10/2013 - 01:22 29
by iliyapolak
Fri, 11/15/2013 - 04:21
Normal topic Visual Studio 2015 RC not recognised
by William M.
Tue, 07/07/2015 - 15:52 2
by Tim P.
Tue, 07/07/2015 - 16:12
Normal topic Viewing Skylake C-state C8/C9/10 using PCM v2.9
by WJ C.
Tue, 09/29/2015 - 01:38 6
by Roman Dementiev...
Wed, 09/30/2015 - 07:02
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For more complete information about compiler optimizations, see our Optimization Notice.