Intel® Developer Zone:
Software Tuning, Performance Optimization & Platform Monitoring

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Discussion around topics such as monitoring and software tuning methodologies, Performance Monitoring Unit (PMU) of Intel microprocessors, software characterization, software optimization techniques for performance and power/energy, monitoring CPU core and graphics processors and other system coprocessors as well asimmerging runtime usages for software metering and quality of service.
Intel monitors this forum Monday – Friday, 09:00 – 17:00 Pacific Time (GMT –7:00). Depending on the amount of research we need to do to track down the answer, it may take a day or two for us to respond.
Topic / Topic startersort ascending Post date Replies Last Post
Normal topic Uncore frequency on Haswell
by futureishere
Thu, 03/19/2015 - 12:24 8
by John McCalpin
Thu, 07/23/2015 - 08:47
Normal topic Uncore Frequency Control on HSW, BDW, SKY
by Johannes Hofmann
Thu, 07/21/2016 - 23:24 1
by John McCalpin
Fri, 07/22/2016 - 10:36
Normal topic uncore event counter reading
by yang s.
Thu, 03/19/2015 - 06:34 12
by John McCalpin
Thu, 08/06/2015 - 18:52
Normal topic unaligned data access for -xHost option on Intel-AVX platform
by felixdietzsch
Fri, 06/13/2014 - 05:41 1
by Tim P.
Fri, 06/13/2014 - 06:10
Normal topic Unable to load MacMSRDriver
by Octav C.
Thu, 09/10/2015 - 14:34 2
by Patrick Konsor ...
Mon, 06/20/2016 - 15:04
Normal topic Unable to generate 'GPA' data with my Intel HD Graphics 4000
by Max B.
Sun, 11/16/2014 - 11:49 0
by Max B.
Sun, 11/16/2014 - 11:49
Normal topic two questions about vtune.
by Wang Ruifeng
Mon, 09/09/2013 - 23:11 1
by Patrick Fay (Intel)
Tue, 09/10/2013 - 08:43
Normal topic Turbo boost test tool for Haswell CPU
by Jonas T.
Mon, 10/20/2014 - 01:27 6
by Tim P.
Wed, 11/05/2014 - 08:47
Normal topic TSX conflict aborts for single threaded applications
by futureishere
Mon, 08/26/2013 - 08:03 6
by futureishere
Thu, 09/05/2013 - 07:13
Normal topic Tsc-deadline feature. Cpu family ?
by Jog L.
Wed, 06/03/2015 - 23:03 2
by Jog L.
Thu, 06/04/2015 - 06:41
Hot topic TSC Synchronization Across Cores
by Samuel M.
Tue, 04/16/2013 - 20:00 18
by Sergey Kostrov
Fri, 04/26/2013 - 20:49
Normal topic Trying to understand AFREQ results in Intel "pcm" tool output, strange lmbench performance
by Chris Friesen
Wed, 07/04/2012 - 11:07 5
by John McCalpin
Fri, 07/13/2012 - 15:29
Normal topic Trying to make sense of L1D (0x51), L2_RQSTS(0x24) and OFFCORE_REQUESTS (0xB0)
by perfwise
Tue, 12/06/2011 - 19:35 2
by Patrick Fay (Intel)
Tue, 12/20/2011 - 08:07
Normal topic Trying to download IntelPerformanceCounterMonitorV2-7.zip: Access Denied
by Victor B.
Tue, 09/16/2014 - 00:17 3
by Otto Bruggeman ...
Thu, 09/18/2014 - 01:09
Normal topic Trying to disable Processor idle states (C states) on Windows PC
by mashdev
Mon, 03/26/2012 - 13:56 7
by iliyapolak
Sat, 12/22/2012 - 00:54
Normal topic Trouble getting useful information from the PCM
by Kirk S.
Sun, 03/30/2014 - 13:48 1
by Roman Dementiev...
Mon, 03/31/2014 - 00:04
Normal topic Triggering Of a method 2 times In Intel i7 Processors
by Anil N.
Mon, 12/29/2014 - 05:14 3
by iliyapolak
Mon, 01/05/2015 - 23:52
Normal topic Tracking what prevents the processor from entering deeper PCStates
by Victor P.
Mon, 08/15/2016 - 10:43 0
by Victor P.
Mon, 08/15/2016 - 10:43
Normal topic TOR_INSERTS. MISS_OPCODE count is bigger than OPCODE. It is unexpected.
by Alexander Alexeev
Thu, 08/29/2013 - 05:03 2
by Alexander Alexeev
Thu, 08/29/2013 - 13:07
Hot topic To use FPU
This topic has been moved to "Intel ISA Extensions" (View topic)
Normal topic To site admin - when do posts get queued for review?
by Rolf Andersson
Mon, 08/05/2013 - 23:20 3
by iliyapolak
Tue, 08/06/2013 - 02:22
Normal topic TLB, large pages and prefetching
by cagribal
Tue, 10/30/2012 - 06:55 9
by John McCalpin
Fri, 10/09/2015 - 15:43
Normal topic TLB misses
by cagribal
Wed, 03/07/2012 - 03:30 3
by Patrick Fay (Intel)
Wed, 03/07/2012 - 03:30
Normal topic TLB Fault Processing and Caches
by drMikeT
Wed, 04/04/2012 - 14:48 1
by drMikeT
Fri, 04/13/2012 - 13:22
Normal topic TLB events in Intel(R) Xeon(R) CPU E5-2695 v2
by LY
Wed, 11/11/2015 - 08:09 4
by LY
Thu, 11/12/2015 - 20:38
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Hot topic with new posts
Hot topic without new posts
Sticky topic
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For more complete information about compiler optimizations, see our Optimization Notice.