Intel® Developer Zone:
Software Tuning, Performance Optimization & Platform Monitoring

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Discussion around topics such as monitoring and software tuning methodologies, Performance Monitoring Unit (PMU) of Intel microprocessors, software characterization, software optimization techniques for performance and power/energy, monitoring CPU core and graphics processors and other system coprocessors as well asimmerging runtime usages for software metering and quality of service.
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Topic / Topic starter Post date Replies Last Post
Normal topic Intel PCM and L1 cache
by Steffen Zeuch
Tue, 05/06/2014 - 11:06 5
by Roman Dementiev...
Fri, 05/23/2014 - 04:31
Normal topic Disabling Prefetching on the i5
by chetreb
Mon, 11/26/2012 - 16:33 12
by Roman Dementiev...
Wed, 09/24/2014 - 23:40
Normal topic Can't run the Intel Power Gadget
by John D.
Wed, 03/04/2015 - 19:16 11
by John D.
Thu, 03/05/2015 - 09:59
Normal topic RAPL for energy measurement
by Yunqi Z.
Wed, 04/03/2013 - 13:52 9
by Anmol Panda
Thu, 12/08/2016 - 01:41
Normal topic How many pipeline stages detect branch mispredictions?
by T C
Tue, 07/07/2015 - 16:52 0
by T C
Tue, 07/07/2015 - 16:52
Normal topic Why is an E5 1650v3 slower than an i5 4570S ??
by Marcus K.
Thu, 05/28/2015 - 09:51 8
by Tim P.
Sat, 05/30/2015 - 10:44
Normal topic Problems interpreting timing results for code with microsecond duration
by Porter, Andrew
Thu, 04/21/2016 - 05:59 3
by Porter, Andrew
Fri, 04/22/2016 - 05:37
Normal topic DEMAND_CODE_RD PMC
by Min X.
Wed, 03/01/2017 - 14:35 7
by McCalpin, John
Mon, 03/06/2017 - 09:05
Normal topic Avoid cache writing on read?
by yotamhc
Tue, 11/29/2011 - 05:36 7
by Sergey Kostrov
Tue, 11/29/2011 - 05:36
Normal topic verifying first-touch memory allocation
by Tim P.
Fri, 06/14/2013 - 10:26 4
by McCalpin, John
Mon, 06/24/2013 - 12:34
Normal topic Can PCM Read/Write a WO registry bit?
by Tongliang L.
Wed, 08/21/2013 - 19:34 0
by Tongliang L.
Wed, 08/21/2013 - 19:34
Normal topic IA-32e mode performance question
by Ravi K.
Fri, 09/25/2015 - 19:56 0
by Ravi K.
Fri, 09/25/2015 - 19:56
Normal topic Performance variation ever time restarting DPDK based App
by Praveen S.
Thu, 08/04/2016 - 16:12 0
by Praveen S.
Thu, 08/04/2016 - 16:12
Normal topic Missing Email Setting for Intel Rapid Storage Technology
by Gary A.
Tue, 07/11/2017 - 15:49 1
by Gary A.
Wed, 07/12/2017 - 14:59
Normal topic Amazing but unexpected behavior of a simple C language test
by bostoniancarlos
Thu, 03/22/2012 - 15:29 7
by Sergey Kostrov
Thu, 03/22/2012 - 15:29
Normal topic How 32 bytes alignment affect uop cache?
by Wei M.
Wed, 10/16/2013 - 15:35 6
by iliyapolak
Thu, 10/17/2013 - 10:50
Normal topic Unwanted frequency transitions in Haswell
by Will N.
Thu, 01/14/2016 - 10:38 3
by McCalpin, John
Tue, 01/19/2016 - 10:06
Normal topic Avoid that Performance Counters gets Re-Programmed
by giovanni m.
Tue, 10/18/2016 - 01:16 3
by McCalpin, John
Wed, 10/19/2016 - 06:04
Normal topic sys_reset# use with Intel® 5 Series HM55 chipset and an embedded COM Express™ Intel® Core™ i7 Celeron processor
by Lior M.
Sun, 09/28/2014 - 02:26 0
by Lior M.
Sun, 09/28/2014 - 02:26
Normal topic Branch Trace Store
by q1nex
Thu, 06/07/2012 - 18:27 3
by Patrick Fay (Intel)
Wed, 06/20/2012 - 07:44
Normal topic What are REMOTE_CACHE_FWD offcore response events ?
by Manuel S.
Mon, 02/10/2014 - 12:44 1
by Manuel S.
Tue, 02/18/2014 - 06:41
Normal topic some question about QPI
by Yinchao Z.
Wed, 03/30/2016 - 19:06 2
by McCalpin, John
Tue, 04/05/2016 - 12:16
Normal topic Reading the nominal CPU frequency on Linux
by Michael G.
Tue, 09/18/2012 - 07:37 3
by McCalpin, John
Tue, 09/25/2012 - 10:35
Normal topic [PCM] Processor Counter Monitor replaces Intel Performance Counter Monitor
by Thomas Willhalm...
Thu, 01/05/2017 - 11:59 2
by Thomas Willhalm...
Thu, 01/19/2017 - 08:40
Normal topic User programmable DMA controller in the system with Xeon E3-1275v3 and C226 PCH?
by Slavisa Z.
Thu, 01/08/2015 - 09:09 5
by Slavisa Z.
Fri, 01/09/2015 - 10:53
New posts
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Hot topic with new posts
Hot topic without new posts
Sticky topic
Locked topic
For more complete information about compiler optimizations, see our Optimization Notice.