P-State transition monitoring

P-State transition monitoring

rdmsr64's picture

Hello, I'm doing several profiling routines, including MSR_PERF_STATUS for P-State read-out. I'm a bit puzzled as to why for SandyBridgeIA32_PERF_CTL is defined per thread but MSR_PERF_STATUS per package. Windows and Linux Power Management are setting each core individually, but by reading out 0x198 on every core I also see individual P-States per core in PERF_STATUS. Giving that PERF_STATUS is only defined per package, and not per thread, what should I make of it? Could someone please clarify if this is intended or a documentation error? Thanks

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Nicolae Popovici (Intel)'s picture

On IAdifferent cores from the same packageare always running at the same P-State. ThereforePERF_STATUS will give you the P-State all non-idlecores within a package are running at.

rdmsr64's picture

How doesIA32_APERF /IA32_MPERF (per thread) come into play if we only really need to read 0x198? Is it a legacy algorithm (described in example 14-1 of volume 3A)? Or why do we have both, what's the difference on SandyBridge?

Nicolae Popovici (Intel)'s picture

On IAdifferent cores from the same packageare always running at the same P-State. ThereforePERF_STATUS will give you the P-State all non-idlecores within a package are running at.

rdmsr64's picture

Could you please revisit, you seem to have posted the same answer?

mkamruzz's picture

That means it is NOT possible to apply dvfs per-core. Is it possible to use different frequency for different cores but same volatge in the same package?

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