cmpxchg16b

cmpxchg16b

Rumor has it that Intel might drop cmpxchg16b. Is this true? It's still in the documentation the last time I checked.

Normally, you shouldn't really concern yourself with individual instructions as most programming is done with a compiled language. But if you're trying to implement various kinds of lock-free algorithms then individual instructions become important. Right now, Intel ia86-64 processors have a distinct advantage over AMD's processors.

Message Edited by hagabb on 10-04-2004 11:35 AM

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jseigh wrote:
Rumor has it that Intel might drop cmpxchg16b. Is this true? It's still in the documentation the last time I checked.

Normally, you shouldn't really concern yourself with individual instructions as most programming is done with a compiled language. But if you're trying to implement various kinds of lock-free algorithms then individual instructions become important. Right now, Intel ia86-64 processors have a distinct advantage over AMD's processors.

Oh, so very true!

Please, hardware folk... Don't cut off dwcas!?!?!?

:O

lockfree wrote:

jseigh wrote:
Rumor has it that Intel might drop cmpxchg16b. Is this true? It's still in the documentation the last time I checked.

Normally, you shouldn't really concern yourself with individual instructions as most programming is done with a compiled language. But if you're trying to implement various kinds of lock-free algorithms then individual instructions become important. Right now, Intel ia86-64 processors have a distinct advantage over AMD's processors.

Oh, so very true!

Has anyone got a published confirmation for this? Is this something that is available in Itanium, but not in the newer EM64T processors? Any pointers or other details would be most helpful.

--clay

ClayB wrote:

Has anyone got a published confirmation for this? Is this something that is available in Itanium, but not in the newer EM64T processors? Any pointers or other details would be most helpful.

--clay

cmpxchg16b exists on Intel's IA32-64 processors not AMD's. The question is who blinks first, Intel or AMD? I suppose it's moot since I'm not upgrading to 64 bits until processor power requirements go back below 100 watts. By the time that happens I imagine the question will have been resolved and I'll just deal with whatever the outcome is. That that it matters.

Is CMPXCHG16b available in Ivy Bridge? I need your help, because I'll install Windows 8.1 Preview in my Ivy Bridge Core i7-3537U Ultrabook. Thanks.

The 64-bit processor would be unable to perform a DCAS operation (pointer and ABA code). While you could use TSX or RTM without using DCAS, this would be short sighted of Intel to remove an instruction to force code change. This would break a lot of code.

Jim Dempsey

www.quickthreadprogramming.com

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