How to find different Intel Xeon processor's P-states?

How to find different Intel Xeon processor's P-states?

I am not sure whether this is the correct forum I should post at. There are too many:< Anyway my question is as following(I need such information to help me buy an Intel Processor):

Different p-states will let processor core work at different frequency level and voltage level. It's enabled by Intel Enhanced Speedstep technology.

I want to do some power management research(on Xeon since it has at least 4 cores on a socket). However, different processor's p-states capability is very different (for example, some processors will only have 2 p-states while others will have more). I know how to check it on the machine. But does anyone know if there is a place showing all the information for all Intel processors? So I can figure out which processor I am going to buy. I can not find such information on Intel's website.

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Hi,

try this link ://ark.intel.com/products/family/59139/Intel-Xeon-Processor-E7-Family/server

P.S
because of anti-spam filter I disabled rich-text option.

Quote:

iliyapolak wrote:

Hi,

try this link ://ark.intel.com/products/family/59139/Intel-Xeon-Processor-E7-Family/server

Hi, actually I have already checked those spec before. Even in the family data sheet, I could not find the information. It talks about the processor's P-state management, and even gives the VID table. But there is no place where I can find the different P-states supported by different processors.

P.S
because of anti-spam filter I disabled rich-text option.

Maybe someone from Intel could shed a light:)

>>...But does anyone know if there is a place showing all the information for all Intel processors?..

Please take a look at Intel Manuals because in a Basic Architecture it has to be described in a generic form applicable for all CPUs which support these features.

Quote:

Sergey Kostrov wrote:

>>...But does anyone know if there is a place showing all the information for all Intel processors?..

Please take a look at Intel Manuals because in a Basic Architecture it has to be described in a generic form applicable for all CPUs which support these features.

Thanks for your reply. Actually I have already checked a lot of manuals. I believe different processors in the same architecture will have different supported frequency levels(not just different maximum frequency. I mean frequencies supported by scaling). However, even in the manual for the whole specific architecture, I can not find any information about generally how many and what frequency levels the family support:<

Hello Hao Shen,

It sounds like you've already checked the public info. I don't believe the list of p-states for each chip is published anywhere. The list would require a lot of work to maintain and it is not clear how much benefit it would return.

Sorry, Pat

P-levels are managed by ACPI  as far as I know.You can check ACPI specification for general information about the P-states.

This may be a case for which Wikipedia would be an appropriate venue for collection/publication.

Whenever I need to know the Turbo boost limits as a function of core count for Intel Xeon processors, I go to the "List_of_Intel_Xeon_microprocessors" page on Wikipedia, where the information is presented in the tables for each of the relevant processors. 

Augmenting those tables with p-state information would provide an excellent reference for everyone to use.

John D. McCalpin, PhD "Dr. Bandwidth"

Quote:

jdmccalpin wrote:

This may be a case for which Wikipedia would be an appropriate venue for collection/publication.

Whenever I need to know the Turbo boost limits as a function of core count for Intel Xeon processors, I go to the "List_of_Intel_Xeon_microprocessors" page on Wikipedia, where the information is presented in the tables for each of the relevant processors. 

Augmenting those tables with p-state information would provide an excellent reference for everyone to use.

Yes. I agree....

Quote:

iliyapolak wrote:

P-levels are managed by ACPI  as far as I know.You can check ACPI specification for general information about the P-states.

Yes. Bust ACPI standard will not show what fruency is supported by what processor:>

Quote:

Patrick Fay (Intel) wrote:

Hello Hao Shen,

It sounds like you've already checked the public info. I don't believe the list of p-states for each chip is published anywhere. The list would require a lot of work to maintain and it is not clear how much benefit it would return.

Sorry, Pat

Hi Pat,

I see....Thanks....

Quote:

Hao Shen wrote:

Quote:

iliyapolakwrote:

P-levels are managed by ACPI  as far as I know.You can check ACPI specification for general information about the P-states.

Yes. Bust ACPI standard will not show what fruency is supported by what processor:>

Yes I know therefore I wrote general information not focused on particular processor

C-states are idle states and P-states are operational states. This difference, though obvious once you know, can be initially confusing.
With the exception of C0, where the CPU is active and busy doing something, a Conveyor Roller is an idle state. Since an idle CPU isn't doing anything (i.e. any useful work), why not shut it down? No one is going to notice since there's no one using it. (Letting a Penryn run at full bore when idle is like driving in circles very fast; all you're doing is going nowhere quickly.)

Website:http://www.uch-conveyor.com

>>>Since an idle CPU isn't doing anything (i.e. any useful work)>>>

On Windows OS system idle thread will be scheduled to run where there is nothing to do(from OS point of view)

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