Essential doubts about MIC MPI Openmp

Essential doubts about MIC MPI Openmp

Hello guys! This is my first post here so apologies so far.

Recently I've started studying MIC but there as some things that I just can't understand and are necessary for my further understanding.

Here are some questions that I'll be more than glad if you explain them to me :)

  • What are those pragmas? Is that unique of Intel's? Is there any in depth explanation about them?
  • I have an application where I have to use *MPI (communication between nodes), *OpenMP (multicore) and the use of coprocessors.

* I've found out that MPI is used on the coprocessors as well (don't know if they are the same), just as OpenMP. I suppose that there are some

Intel Libraries that are responsible for each one of them (all I know is that MIC programs the coprocessors).

  • Is there different pragmas for Intel MPI, OpenMP and MIC? Question below continue (I think they are related because what I'm figuring in my mid is some pragmas that calls MPI and other pragmas that calls OpenMP or MIC on the same code).
  • How am I supposed to compile all that? I noticed that exists mpicc micc icc... How am I supposed to deal with all that? Some example are helpful.

Last thing that could help me the most:

Is there any example code that uses each of these solutions (mpi, openmp, mic) or all of them together because I couldn't find much of it with explanations. For example : Pragmas. They just put it on their code but they don't explain why and they don't the whole pragmas options.

 

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Standard MPI and OpenMP, and their combination, are important programming models for MIC.  The original MIC offload pragmas are a proprietary extension of OpenMP and the predecessor of ACC (another proprietary offload programming model).  Many existing applications from other platforms are running on MIC with MPI and OpenMP.

OpenMP 4 has been released as a standard including portable facilities to replace those in MIC and ACC offload models.  A basic implementation is included in the current Intel compilers, and one is under development in gcc.  Several of us are hoping that soon it will be sufficiently implemented to write about.  My own examples of OpenMP 4 target (offload) are mostly working.  There isn't much documentation yet beyond what is in the standard.

Examples of MIC offload syntax are included with the compiler release; additional examples have been posted to web or included in published textbooks.

Intel MPI uses similar named wrappers for MIC as in the previously established Xeon MPI.  The mpicc etc. are non-functional for coprocessor; you must use mpiicc, mpiicpc, mpiifort, as on the host implementations of Intel MPI for Intel compilers.    OSU mvapich, mpich, OpenMPI, and possibly other MPI implementations have been tested.  In MPI usage, if the application is to run ranks on both Xeon host and MIC coprocessor, it must be compiled separately targetting host and cross compiled for coprocessor.  There are additional options for mpirun command to specify ranks allocated to host and coprocessor

I don't know of examples using both offload (or OpenMP target) and MPI to run on coprocessor.  If an existing MPI/OpenMP application is suitable for MIC coprocessor, it's simpler to run without using offload model.

For Windows, MPI on coprocessor is not supported.  MPI could still be run on host with coprocessor used via offload model (similar to what was done on linux for Top500 benchmarks with MIC).

Are those pragmas Intel's?

Is there anything (list or w/e) explaining the use of each pragma?

So.. from what I've read It isn't possible to write a code mixing Intel's MPI+OpenMP+MIC, right? What's one way to do that? 

Thanks for replying! :)

> So.. from what I've read It isn't possible to write a code mixing Intel's MPI+OpenMP+MIC, right? What's one way to do that? 

I don't know where you read this, because it is utterly WRONG. Many of the major codes that run on MIC are doing exactly this.

You can freely mix Intel's OpenMP and MPI with MPI processes running on MIC and Xeon. Indeed running MPI executables on MIC and treating them as "just another MPI process" is a fine, simple way to use the machine.

Complexity and the need to rewrite some of your code to use the new OpenMP 4.0 offload pragmas, or the pre-standardization Intel spellings of these comes in when you use the MIC as a coprocessor inside a single MPI process. If all you want to do is use existing code that mixes OpenMP and MPI you can just compile and run. (Though performance will likely be horrible until you tune!)

I'm sorry. Looks like I didn't make my sentence clear enough.

From what you've said : "In MPI usage, if the application is to run ranks on both Xeon host and MIC coprocessor, it must be compiled separately targetting host and cross compiled for coprocessor. "

Mixing MPI OpenMP MIC isn't possible unless you compile it separately.

Have you got any example code?

Thanks a lot! :D

>>Mixing MPI OpenMP MIC isn't possible unless you compile it separately.

So?

When your non-MIC MPI application is spread across machines of different architecture (e.g. Intel64 and IA32, and/or systems with AVX together with systems without AVX) you will compile separately.

Unless you have a specific reason for doing so, one does not blend multiple threading models into the same application. Typical configurations:

OpenMP+MIC
MPI+MIC
TBB+MIC
Cilk Plus + MIC

Going beyond that is possible and used by some, and they are responsible for tying together the inter-process communication.

Jim Dempsey

www.quickthreadprogramming.com

I suggest that you want to use the MIC and Host in the so called "symmetric" mode. How to compile for the Host and MIC separately and run the binaries in symmetric mode is explained here:

http://software.intel.com/en-us/articles/using-the-intel-mpi-library-on-...


# mpirun -n 2 -host knightscorner1 ./montecarlo.host 
: -n 3 -host mic0 /tmp/montecarlo.mic 
: -n 5 -host mic1 /tmp/montecarlo.mic

Hello world: rank 0 of 10 running on knightscorner1
Hello world: rank 1 of 10 running on knightscorner1
Hello world: rank 2 of 10 running on knightscorner1-mic0
Hello world: rank 3 of 10 running on knightscorner1-mic0
Hello world: rank 4 of 10 running on knightscorner1-mic0
Hello world: rank 5 of 10 running on knightscorner1-mic1
Hello world: rank 6 of 10 running on knightscorner1-mic1
Hello world: rank 7 of 10 running on knightscorner1-mic1
Hello world: rank 8 of 10 running on knightscorner1-mic1
Hello world: rank 9 of 10 running on knightscorner1-mic1

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