I'm working on a security measure based on the virtualization instructions. The only requirement is memory isolation. So, to minimize performance impact, a vmexit should only be issued when a (EPT) protected page is accessed. On my processor however, access to control registers always causes an vmexit, resulting in a noticeable impact from the hypervisor. The documentation states that future processors may be more flexible and allow the programmer to disable the vmexits in such situations. Are there processors on the market yet that support this feature? If not, when will they become available?