After reading "Intel Virtualization Technology for Directed I/O Architecture Specification" Rev 1.1, I have some questions regarding Interrupt Remapping of Message Signalled Interrupts for PCI devices behind a PCIe-to-PCI bridge. Page 37 of the spec says:
For message-signaled interrupt requests from devices behind PCI Express-to-PCI/PCI-X
bridges, the requester identifier in those interrupt requests may be that of the interrupting
device or the requester-id with the bus number field equal to the bridges secondary
interfaces bus number and device and function number fields value of zero. Section 184.108.40.206
describes legacy behavior of these bridges. Due to this aliasing, interrupt-remapping
hardware does not isolate interrupts from individual devices behind such bridges.
Does "interrupt-remapping hardware does not isolate interrupts from individual devices behind such bridges" mean *all* PCIe-to-PCI bridges?
If I have multiple devices behind a PCIe-to-PCI bridge, and I am using the interrupt remapping feature of VT-d, all of the MSI devices behind the PCIe-to-PCI bridge will be assigned to the same domain. Do these devices receive the same HANDLE/SUBHANDLE; the same message address & data would be written to their MSI capability registers? In essence, their MSIs will no longer be assigned a unique interrupt vector -- they will all be sharing 1 MSI interrupt vector? How do you handle MSI-X?
It sound like VT-d interrupt remapping would require drivers for legacy PCI devices
using MSI/MSI-X to check "is this mine" at primary interrupt time. This seems to invalidate the "MSIs are not shared" paradigm set by Windows Vista. Please reference the discussion by Jake Oshins and Davis Walker at the OSROnline discussion "MSIs: documentation discrepancies regarding" http://www.osronline.com/showThread.cfm?link=118548. To support VT-d's "MSIs behind PCIe-to-PCI bridges are shared" paradigm, drivers authored for Vista would require modification and would likely incur additional performance overhead at primary interrupt time to check "is this interrupt mine?".
I have a large install base of legacy PCI devices (CompactPCI and PXI
devices in expansion chasses) that connect to newer, PCI Express-based
systems through PCIe-to-PCI bridges. Perhaps we don't want to use VT-d with these devices? Customers would like partitioning, but generally not if the performance cost is to high.