memory addressing(effective address or offset) in 16 bit protected or real mode

memory addressing(effective address or offset) in 16 bit protected or real mode

We know that memory is addressed by a combination of
(Base+Index*Scale+Displacement). If the code is 16 bit protected mode
and addresses a memory location, can we specify 8 bit registers like
AH, BH base or index registers?
The same question is for a code that is executed in 16 bit real address (or 64 bit mode).

Intel 64 and IA-32 software developer's manual mentions 32 or 64 bit registers in 64 bit mode I think.

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Sounds to me like you're asking if a post 16-bit cpu could operate as iftreating thememory address space as 8-bit.
I don't think so

Thank you to answer my question.

My question is how we can write effective address in 16, 32 or 64 bit modes. We know that the following is a valid effective address in 16 bit IA-32 protected:
Can we specify: [BH+SI]+disp8 as an address?

Also suppose we write a code for IA-32 protected, the following is a valid effective address:

But is , [AX]+disp32 a valid valid effective address? how about [AL]+disp32?

In real mode(16-bit) we have [BX]+disp8 but is "[BL]+disp8" valid?

And my last question is that how you write a valid address in 64 bit mode?

"Can you specify [BH+SI]+disp8 as an address?"

First you cannot mix register of different sizes. In addressing form, the size of register is governed by the ADDRESS_SIZE attribute, if your codelive in16-bit mode, that attribute is 16 bit by default. If you override ADDRESS_SIZE attribute with the 67H prefix, the ADDRESS_SIZE becomes 32-bit.

So, an assembler will reject the syntax if you try, and the hardware will operate in 16/32/64-bit address space, depending on the operatingmode. And ADDRESS_SIZE prefix override onlyapply in 16/32 bit modes.

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