Getting Started with Intel® Integrated Performance Primitives 2018 (Beta Update) for macOS*
Intel® Integrated Performance Primitives (Intel® IPP) is a software library that provides a broad range of functionality, including general signal and image processing, computer vision, data compression, and string manipulation.
Intel IPP is installed as part of the following suite:
The library is also provided as a standalone package under the Community Licensing program.
Prerequisites
Set Environment Variables
After installing Intel IPP, set the IPPROOT, LD_LIBRARY_PATH environment variables by running the script appropriate to your target platform architecture. The scripts are available in <install dir>/ipp/bin.
By default, the <install dir> is /opt/intel/compilers_and_libraries_2018.x.xxx/mac
Build and Run Your First Intel® IPP Application
The code example below represents a short application to help you get started with Intel IPP:
#include "ipp.h"
#include <stdio.h>
int main(int argc, char* argv[])
{
const IppLibraryVersion *lib;
IppStatus status;
Ipp64u mask, emask;
/* Initialize Intel IPP library */
ippInit();
/* Get Intel IPP library version info */
lib = ippGetLibVersion();
printf("%s %s\n", lib->Name, lib->Version);
/* Get CPU features and features enabled with selected library level */
status = ippGetCpuFeatures( &mask, 0 );
if( ippStsNoErr == status ) {
emask = ippGetEnabledCpuFeatures();
printf("Features supported by CPU\tby Intel IPP\n");
printf("-----------------------------------------\n");
printf(" ippCPUID_MMX = ");
printf("%c\t%c\t",( mask & ippCPUID_MMX ) ? 'Y':'N',( emask & ippCPUID_MMX ) ? 'Y':'N');
printf("Intel(R) architecture MMX(TM) technology supported\n");
printf(" ippCPUID_SSE = ");
printf("%c\t%c\t",( mask & ippCPUID_SSE ) ? 'Y':'N',( emask & ippCPUID_SSE ) ? 'Y':'N');
printf("Intel(R) Streaming SIMD Extensions\n");
printf(" ippCPUID_SSE2 = ");
printf("%c\t%c\t",( mask & ippCPUID_SSE2 ) ? 'Y':'N',( emask & ippCPUID_SSE2 ) ? 'Y':'N');
printf("Intel(R) Streaming SIMD Extensions 2\n");
printf(" ippCPUID_SSE3 = ");
printf("%c\t%c\t",( mask & ippCPUID_SSE3 ) ? 'Y':'N',( emask & ippCPUID_SSE3 ) ? 'Y':'N');
printf("Intel(R) Streaming SIMD Extensions 3\n");
printf(" ippCPUID_SSSE3 = ");
printf("%c\t%c\t",( mask & ippCPUID_SSSE3 ) ? 'Y':'N',( emask & ippCPUID_SSSE3 ) ? 'Y':'N');
printf("Supplemental Streaming SIMD Extensions 3\n");
printf(" ippCPUID_MOVBE = ");
printf("%c\t%c\t",( mask & ippCPUID_MOVBE ) ? 'Y':'N',( emask & ippCPUID_MOVBE ) ? 'Y':'N');
printf("The processor supports MOVBE instruction\n");
printf(" ippCPUID_SSE41 = ");
printf("%c\t%c\t",( mask & ippCPUID_SSE41 ) ? 'Y':'N',( emask & ippCPUID_SSE41 ) ? 'Y':'N');
printf("Intel(R) Streaming SIMD Extensions 4.1\n");
printf(" ippCPUID_SSE42 = ");
printf("%c\t%c\t",( mask & ippCPUID_SSE42 ) ? 'Y':'N',( emask & ippCPUID_SSE42 ) ? 'Y':'N');
printf("Intel(R) Streaming SIMD Extensions 4.2\n");
printf(" ippCPUID_AVX = ");
printf("%c\t%c\t",( mask & ippCPUID_AVX ) ? 'Y':'N',( emask & ippCPUID_AVX ) ? 'Y':'N');
printf("Intel(R) Advanced Vector Extensions instruction set\n");
printf(" ippAVX_ENABLEDBYOS = ");
printf("%c\t%c\t",( mask & ippAVX_ENABLEDBYOS ) ? 'Y':'N',( emask & ippAVX_ENABLEDBYOS ) ? 'Y':'N');
printf("The operating system supports Intel(R) AVX\n");
printf(" ippCPUID_AES = ");
printf("%c\t%c\t",( mask & ippCPUID_AES ) ? 'Y':'N',( emask & ippCPUID_AES ) ? 'Y':'N');
printf("AES instruction\n");
printf(" ippCPUID_SHA = ");
printf("%c\t%c\t",( mask & ippCPUID_SHA ) ? 'Y':'N',( emask & ippCPUID_SHA ) ? 'Y':'N');
printf("Intel(R) SHA new instructions\n");
printf(" ippCPUID_CLMUL = ");
printf("%c\t%c\t",( mask & ippCPUID_CLMUL ) ? 'Y':'N',( emask & ippCPUID_CLMUL ) ? 'Y':'N');
printf("PCLMULQDQ instruction\n");
printf(" ippCPUID_RDRAND = ");
printf("%c\t%c\t",( mask & ippCPUID_RDRAND ) ? 'Y':'N',( emask & ippCPUID_RDRAND ) ? 'Y':'N');
printf("Read Random Number instructions\n");
printf(" ippCPUID_F16C = ");
printf("%c\t%c\t",( mask & ippCPUID_F16C ) ? 'Y':'N',( emask & ippCPUID_F16C ) ? 'Y':'N');
printf("Float16 instructions\n");
printf(" ippCPUID_AVX2 = ");
printf("%c\t%c\t",( mask & ippCPUID_AVX2 ) ? 'Y':'N',( emask & ippCPUID_AVX2 ) ? 'Y':'N');
printf("Intel(R) Advanced Vector Extensions 2 instruction set\n");
printf(" ippCPUID_AVX512F = ");
printf("%c\t%c\t",( mask & ippCPUID_AVX512F ) ? 'Y':'N',( emask & ippCPUID_AVX512F ) ? 'Y':'N');
printf("Intel(R) Advanced Vector Extensions 3.1 instruction set\n");
printf(" ippCPUID_AVX512CD = ");
printf("%c\t%c\t",( mask & ippCPUID_AVX512CD ) ? 'Y':'N',( emask & ippCPUID_AVX512CD ) ? 'Y':'N');
printf("Intel(R) Advanced Vector Extensions CD (Conflict Detection) instruction set\n");
printf(" ippCPUID_AVX512ER = ");
printf("%c\t%c\t",( mask & ippCPUID_AVX512ER ) ? 'Y':'N',( emask & ippCPUID_AVX512ER ) ? 'Y':'N');
printf("Intel(R) Advanced Vector Extensions ER instruction set\n");
printf(" ippCPUID_ADCOX = ");
printf("%c\t%c\t",( mask & ippCPUID_ADCOX ) ? 'Y':'N',( emask & ippCPUID_ADCOX ) ? 'Y':'N');
printf("ADCX and ADOX instructions\n");
printf(" ippCPUID_RDSEED = ");
printf("%c\t%c\t",( mask & ippCPUID_RDSEED ) ? 'Y':'N',( emask & ippCPUID_RDSEED ) ? 'Y':'N');
printf("The RDSEED instruction\n");
printf(" ippCPUID_PREFETCHW = ");
printf("%c\t%c\t",( mask & ippCPUID_PREFETCHW ) ? 'Y':'N',( emask & ippCPUID_PREFETCHW ) ? 'Y':'N');
printf("The PREFETCHW instruction\n");
printf(" ippCPUID_KNC = ");
printf("%c\t%c\t",( mask & ippCPUID_KNC ) ? 'Y':'N',( emask & ippCPUID_KNC ) ? 'Y':'N');
printf("Intel(R) Xeon Phi(TM) Coprocessor instruction set\n");
}
return 0;
}
This application consists of three sections:
- Initialize the Intel IPP library. This stage is required to take advantage of full Intel IPP optimization. With ippInit(), the best implementation layer is dispatched at runtime; otherwise, the least optimized implementation is chosen. If the Intel IPP application runs without ippInit(), the Intel IPP library is auto-initialized with the first call of the Intel IPP function from any domain that is different from ippCore. In certain debugging scenarios, it is helpful to force a specific implementation layer using ippSetCpuFeatures(), instead of the best as chosen by the dispatcher.
- Get the library layer name and version. You can also get the version information using the ippversion.h file located in the <install_dir>\ipp\include directory.
- Show the hardware optimizations used by the selected library layer and supported by CPU.
To build the code example above, follow the steps:
- Paste the code into the editor of your choice.
- Make sure the compiler and Intel IPP variables are set in your shell. For information on how to set environment variables see Prerequisites.
- Compile with the following command: icc ipptest.cpp -o ipptest -I $IPPROOT/include -L $IPPROOT/lib/<arch> -lippi -lipps -lippcore. For more information about which Intel IPP libraries you need to link to, see Intel IPP Developer Guide.
- Run the application.
Training and Documentation
|
Document |
Description |
|---|---|
| Intel® IPP training resources. | |
|
Contains detailed descriptions of the Intel IPP functions and interfaces for signal, image processing, and computer vision. |
|
|
Contains detailed descriptions of the Intel IPP Cryptography functions. |
|
|
Provides detailed guidance on Intel IPP library configuration, development environment, and linkage modes. |
|
| Tutorial: Image Blurring and Rotation with Intel® IPP |
Demonstrates how to implement box blurring of an image using Intel IPP image processing functions. The tutorial and sample bundle is available for download from Intel® Software Product Samples and Tutorials. |
|
Intel® IPP Examples |
Include a collection of example programs that demonstrate the various features of the Intel IPP library. These programs are located in the components_and_examples_<target>.zip archive at the <install_dir>/ipp/components subdirectory. The archive also includes the ipp-examples.html documentation file at the documentation subdirectory. |
|
Intel® IPP product page. See this page for support and online documentation. |
Note
You can also download an offline version of the documentation from the Intel® Software Development Products Registration Center>Product List>Intel® Parallel Studio XE Documentation Beta.
Legal Information
Intel, and the Intel logo are trademarks of Intel Corporation in the U.S. and/or other countries.
*Other names and brands may be claimed as the property of others.
© Intel Corporation.
|
Optimization Notice |
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|
Intel's compilers may or may not optimize to the same degree for non-Intel microprocessors for optimizations that are not unique to Intel microprocessors. These optimizations include SSE2, SSE3, and SSSE3 instruction sets and other optimizations. Intel does not guarantee the availability, functionality, or effectiveness of any optimization on microprocessors not manufactured by Intel. Microprocessor-dependent optimizations in this product are intended for use with Intel microprocessors. Certain optimizations not specific to Intel microarchitecture are reserved for Intel microprocessors. Please refer to the applicable product User and Reference Guides for more information regarding the specific instruction sets covered by this notice. Notice revision #20110804 |