Intel® Cyclone® 10 LP FPGA Evaluation Kit


This evaluation kit is an easy-to-use platform to begin your FPGA design.

  • Use Intel® Enpirion® Power Solutions to meet project-specific power requirements
  • Configure the Nios® II processor to adjust for project performance and features
  • Leverage several standard I/O headers

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Overview

Power-Optimized System Integration

Achieve high performance with the evaluation kit powered by Cyclone 10 LP FPGA for I/O expansion and bridging applications.

Scalable Performance

Redesign the 32-bit embedded Nios II/e processor to accelerate high performance with evolving market trends for a low power / low cost solution.

Reduce Time to Market

Reduce your learning curve with easy-to-use reference designs, development tools with self-help documentation, and tutorials.

Who Needs This Product

Industrial IoT developers, independent software vendors (ISV), and technologists who:

  • Develop FPGA prototypes and solutions for hardware systems
  • Develop low-power applications with high I/O per logic element
  • Integrate functions or devices via Arduino* UNO R3 shields, PMOD, GPIO, or Ethernet connectors

Industrial Use Cases

  • Interfacing and bridging applications
  • Sensor fusion
  • Power- and cost-optimized solutions

Five Ways to Build Flexibility into Industrial Applications with FPGAs

Kit Details

Hardware

  • Intel® Enpirion® EN5329QI/EN5339QI- 2 A/3 A PowerSoC
  • Intel® Enpirion® EP5358xUI 600 mA PowerSoC DC-DC step-down converters with integrated inductor
  • Gigabit Ethernet
  • Intel® MAX® 10 FPGA
  • USB Y-cable (USB Type-A to mini Type-B) for both on-board Intel FPGA download cable II and 5 V power supply from USB port

Preinstalled Software

  • User manual
  • Board design files: schematics, bill of materials (BOM), and assembly drawings
  • Example designs (FPGA projects and application software):
    • Board test system
    • Nios II processor system

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Specifications

Programmable Logic

Logic elements (LE): 25 K LE

594 kilobit memory

66 18 x 18 multipliers

4 phased-locked loops (PLL)

Up to 150 general purpose I/O (GPIO)

Up to 52 low-voltage differential signaling (LVDS) pairs

 

FPGA Configuration Sources

On-board USB-Blaster* II (JTAG) programming cable

Serial configuration flash for FPGA and processor code

External 2 x 5 JTAG header

 

FPGA I/O Interfaces

4 user push buttons

3 user dual inline package (DIP) switches

1 configuration push button

1 reset push button

4 user LEDs

One Arduino* expansion header (Arduino UNO* R3 compatibility) that can connect with Arduino shields

12-bit Digilent Pmod compatible connector

One 40-pin expansion header with diode protection

Hardware Design

Nios II embedded processor

Cypress HyperBus* controller

Flash controller

On-chip RAM

GPIO for LEDs, push buttons, slide switches, and Arduino

I2C controller: Intel® MAX® 10 FPGA analog-to-digital converter (ADC)

JTAG UART: USB Blaster II

 

Intel MAX 10 FPGA Hardware Design

On-board programmer for Intel® FPGAs

System controller including:

  • Programmable clock adjustment
  • Current measurement for Intel Cyclone 10 LP device power rails
  • Arduino analog input measurement
  • 9-channel, 12-bit ADC, 1 megasample per second (Msps)

 

Power

5-volt DC power adapter with a center-positive jack and the following physical dimensions:

  • Inside jack diameter: 2.1 mm
  • Outside jack diameter: 5.5 mm