Intel® Parallel Computing Centers

Universities, institutions, and labs that work to optimize open source applications.


Getting Started | Intermediate & Advanced | Upcoming Webinars

As the world of high-performance computing (HPC) evolves and becomes accessible, use this starting point to optimization and gaining better compute performance. While many applications already use features of modern hardware, many more do not extract parallelism in their algorithms, nor do they leverage other new capabilities including larger caches, single instruction, multiple data (SIMD), threading, fabric technology, new file architecture, and non-volatile memory technology.

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New Online Training

In June, Intel is starting a new training: Advanced Developer Webinar Series. It targets attendees of code modernization workshops who are looking to massively optimize their application of Intel® Many Integrated Core Architecture. Experts in the field teach the series using leading-edge software tools and libraries. If you’re interested in contributing and becoming a speaker, contact

Getting Started

Below is a collection of self-paced training and reference materials that provide an overview of parallel programming on Intel® architecture.

Intel® Xeon® Product Family and Intel® Xeon Phi™ Product Family

These training materials show how to modernize code for the Intel® Xeon Phi™ processors.They provide insight into understanding OpenMP*, Intel® MPI Library, and Intel® Software to write code using better vectorization and parallelism for hardware optimization.

   Why Use Code Modernization?
   The Purpose of Intel® Many Integrated Core Architecture
   Think Parallel: Modern Applications for Modern Hardware
   Six Steps to Getting Ready for the New Intel® Xeon Phi™ Processor
   Parallel Programming Models and Optimization Strategies
   Deep Dive with Code Modernization Experts


   Code for Speed with High-Bandwidth Memory on Intel Xeon Phi Processors
   Optimize for Intel® Advanced Vector Extensions 512 (Intel® AVX-512) with or without Intel AVX-512 Hardware


   Crash Course on Multithreading with OpenMP*
   An Overview of Programming Options
   Vectorization: The "Other" Parallelism You Need
   Beyond Shared Memory Parallel Programming


   Debugging and Profiling Tools for Intel Xeon Phi Coprocessors
   Intel® HPC Orchestrator
   What's New in Intel® Parallel Studio XE?


   Leveraging Open-Source Software Defined Visualization

Intel Solutions for Lustre* Trainings

This training was developed for anyone who wishes to further their knowledge of the Lustre* file system and gain deeper insights into solutions from Intel. As the basis of reseller and reseller-elite programs, the training will expose you to many concepts of Lustre from fundamentals to advanced implementation and configuration details.

   A New Generation of Lustre* Software Expands HPC
   Getting the Most from Your Data
   High-Performance Parallel Storage for the Enterprise

Intel® Omni-Path Architecture (Intel® OPA) Training

The next generation of HPC switch technology, Intel® Omni-Path Fabric (Intel® OP Fabric), is designed for improving system-level packaging and network efficiency. It enables a broad class of computations requiring scalable, tightly coupled CPU, memory, and storage resources. The training below will help you become familiar with Intel® OPA.

   Intel OPA Webinar Series
   Designing Fabrics with Intel OPA
   Next-Generation Fabric: New Details on the Intel OPA
   Intel OPA Storage
   Advanced Features of the Intel OPA Network Layers
   Democratizing Best-in-Class Interconnect Performance
   The Intel OPA Launch
   Intel OPA: Maximizing HPC Storage Performance

Intermediate & Advanced

These courses provide you with hands-on workshops, code samples, case studies, and domain-focused training that will help you get the most out of your code on Intel architecture. We also encourage you to check out the Intel® Software Innovator and Intel® Black Belt Software Developer programs.

Intel® Xeon® and Intel® Xeon Phi™ Product Family

Continuation of training for OpenMP*, Intel® MPI Library, Intel® Parallel Studio, Intel® Xeon Phi™ processor, Intel® Xeon Phi™ coprocessor, expressing parallelism, and performance optimization methods.


   Programming and Optimization with Parallel Architectures from Intel


   Multi-Channel DRAM (MCDRAM) on Intel Xeon Phi Products – Analysis Methods and Tools
   How to Detect Intel® Advanced Vector Extensions 512 Support (Intel Xeon Phi Processor)
   Scale your Application Across Shared and Distributed Memory
   Squashing Races, Deadlocks, and Memory Bugs


   Software-Defined Visualization: Data Analysis for Current and Future Cyber Infrastructure
   Benefits of Leveraging Software Defined Visualization (OSPRay)
   From Correct to Correct and Efficient with Molecular Dynamics Benchmarks
   From Correct to Correct and Efficient with Hydro2D


   Optimization of Vector Arithmetics in Intel Architecture
   Optimization of Multithreading in Intel Architecture
   Gaining Performance through Vectorization Using Fortran*
   Exploiting Multilevel Parallelism in HPC Applications
   Roofline Analysis: Visualize Impact of Compute Versus Memory Optimizations

Data Layout

   Expressing Parallelism: Single Instruction, Multiple Data (SIMD) Parallelism and Intrinsics


   Analyze Python* App Performance with Intel® VTune™ Amplifier
   How Non-Uniform Memory Access (NUMA) Affects Your Workloads for Intel VTune Amplifier

Solutions for Lustre Training

This advanced-level training was developed for anyone who wishes to further their knowledge of the file system and gain deeper insights into solutions from Intel for the software. The training will expose you to many concepts of implementation and configuration details.

   Analyzing Whole Human Genomes for as Little as $22
   High-Performance Storage for the Oil and Gas Industry
   Lustre Delivers Performance, Scale, and Platform Stability for The Sanger Institute
   DownUnder GeoSolutions* Deploys Lustre for Seismic Data Processing in the Oil and Gas Industry