Linking with Threading Libraries

Intel MKL threading layer defines how Intel MKL functions utilize multiple computing cores of the system that the application runs on. You must link your application with one appropriate Intel MKL library in this layer, as explained below. Depending on whether this is a threading or a sequential library, Intel MKL runs in a parallel or sequential mode, respectively.

In the parallel mode, Intel MKL utilizes multiple processor cores available on your system, uses the OpenMP* or Intel TBB threading technology, and requires a proper threading run-time library (RTL) to be linked with your application. Independently of use of Intel MKL, the application may also require a threading RTL. You should link not more than one threading RTL to your application. Threading RTLs are provided by your compiler. Intel MKL provides several threading libraries, each dependent on the threading RTL of a certain compiler, and your choice of the Intel MKL threading library must be consistent with the threading RTL that you use in your application.

The OpenMP RTL of the Intel® compiler is the libiomp5.so library, located under <parent directory>/compiler/lib. This RTL is compatible with the GNU* compilers (gcc and gfortran). You can find additional information about the Intel OpenMP RTL at https://www.openmprtl.org.

The Intel TBB RTL of the Intel® compiler is the libtbb.so library, located under <parent directory>/tbb/lib. You can find additional information about the Intel TBB RTL at https://www.threadingbuildingblocks.org.

In the sequential mode, Intel MKL runs unthreaded code, does not require an threading RTL, and does not respond to environment variables and functions controlling the number of threads. Avoid using the library in the sequential mode unless you have a particular reason for that, such as the following:

  • Your application needs a threading RTL that none of Intel MKL threading libraries is compatible with
  • Your application is already threaded at a top level, and using parallel Intel MKL only degrades the application performance by interfering with that threading
  • Your application is intended to be run on a single thread, like a message-passing Interface (MPI) application

It is critical to link the application with the proper RTL. The table below explains what library in the Intel MKL threading layer and what threading RTL you should choose under different scenarios:

Application

Intel MKL

RTL Required

Uses OpenMP Compiled with

Execution Mode

Threading Layer

no

any compiler

parallel

Static linking:

libmkl_intel_thread.a

Dynamic linking:

libmkl_intel_thread.so

libiomp5.so

no

any compiler

parallel

Static linking:

libmkl_tbb_thread.a

Dynamic linking:

libmkl_tbb_thread.so

libtbb.so

no

any compiler

sequential

Static linking:

libmkl_sequential.a

Dynamic linking:

libmkl_sequential.so

none

yes

Intel compiler

parallel

Static linking:

libmkl_intel_thread.a

Dynamic linking:

libmkl_intel_thread.so

libiomp5.so

yes

GNU compiler

parallel

Recommended!

Static linking:

libmkl_intel_thread.a

Dynamic linking:

libmkl_intel_thread.so

libiomp5.so

yes

GNU compiler

parallel

Static linking:

libmkl_gnu_thread.a

Dynamic linking:

libmkl_gnu_thread.so

GNU OpenMP RTL

yes

PGI* compiler

parallel

Static linking:

libmkl_pgi_thread.a

Dynamic linking:

libmkl_pgi_thread.so

PGI OpenMP RTL

yes

any other compiler

parallel

Not supported. Use Intel MKL in the sequential mode.

 

For the sequential mode, add the POSIX threads library (libpthread) to your link line because the libmkl_sequential.a and libmkl_sequential.so libraries depend on libpthread.

Optimization Notice

Intel's compilers may or may not optimize to the same degree for non-Intel microprocessors for optimizations that are not unique to Intel microprocessors. These optimizations include SSE2, SSE3, and SSSE3 instruction sets and other optimizations. Intel does not guarantee the availability, functionality, or effectiveness of any optimization on microprocessors not manufactured by Intel. Microprocessor-dependent optimizations in this product are intended for use with Intel microprocessors. Certain optimizations not specific to Intel microarchitecture are reserved for Intel microprocessors. Please refer to the applicable product User and Reference Guides for more information regarding the specific instruction sets covered by this notice.

Notice revision #20110804

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For more complete information about compiler optimizations, see our Optimization Notice.