Overview: Intel® MIC Architecture

This topic only applies to Intel® Many Integrated Core Architecture (Intel® MIC Architecture).

The Intel® C++ Compiler provides several elements to enable programming for and building binaries to run on the Intel® Many Integrated Core Architecture (Intel® MIC Architecture), including:

  • language extensions

  • compiler options

  • environment variables

  • attributes

  • keywords

  • intrinsics

  • class libraries

  • OpenMP* considerations

Code that is defined for offloading runs on an Intel® Xeon® processor-based host, running Linux* or Windows*, and on targets supporting Intel® MIC Architecture.

Programming for Intel® MIC Architecture

You can write parallel programs that offload sections of code to run on the Intel® MIC Architecture, or alternatively, that run natively on Intel® MIC Architecture. Compiling a source file that contains extensions to facilitate programming for the Intel MIC Architecture creates what is called a fat binary which contains both the host binary and an offload binary. Fat binaries can be objects, archives, or executables depending on the options used at compilation. Refer to the documentation on the Offload Extract Tool (offload_extract) for information on how to extract the offload binary from the fat binary.

The compiler provides the following language extensions to facilitate programming for Intel® MIC Architecture:



offload pragma

offload_attribute pragma

offload_transfer pragma

offload_wait pragma

prefetch/noprefetch pragma

Pragmas to control the data transfer between the CPU and the coprocessor.

_Cilk_offload keyword

_Cilk_shared keyword

Keywords to control the data transfer between the CPU and the coprocessor. The data to be exchanged between the CPU and the coprocessor can be arbitrarily complex.

target attribute

An attribute to place variables and functions on the target.

__MIC__ macro

__KNC__ macro


Predefined macros you can use when programming for Intel® MIC Architecture.


Intrinsics for Intel® MIC Architecture.

Class libraries

Class libraries for SIMD operations.

APIs in offload.h

A set of functions for:

  • dealing with multiple coprocessors

  • calling functions on the CPU to modify the coprocessor's execution environment

  • writing code that should not be built for CPU-only execution

Building for Intel® MIC Architecture

The compiler provides the following compiler options and environment variables that you can use when building a binary for Intel® MIC Architecture:

Compiler Option


The negative form of [Q]offload

Ignores language constructs for offloading.

Qmic (Windows*)

mmic (Linux*)

Builds an application that runs natively on Intel® MIC Architecture.


Flags every global routine and global data object in the source file with the offload attribute target(mic).


Specifies options to be used for the specified target and tool.


Specifies the offload optimizer phase to use when optimization reports are generated.


Determines whether the compiler assumes that variables and dynamically allocated memory are padded past the end of the object.


Specifies the cache eviction level to be used by the compiler for streaming loads and stores.


Informs the compiler about the number of hardware threads per core that will be used for an application.


Specifies an alternative loop unroll sequence for gather and scatter loops.

The following environment variables are only a few of the available environment variables for Intel® MIC Architecture:

Environment Variable



Sets the stack size on the coprocessor.


Controls environment variables passed to the coprocessor.


Controls the I/O proxy of stderr and stdout.

For more complete information about compiler optimizations, see our Optimization Notice.