User and Reference Guide for the Intel® C++ Compiler 15.0
Submitted August 18, 2015
- Legal Information
- Introducing the Intel® C++ Compiler
- Feature Requirements
- Getting Help and Support
- Related Information
- Notational Conventions
- Getting Started
- Overview: Getting Started
- Using the Command Line
- Specifying Location of Compiler Components with compilervars File
- Invoking the Intel® Compiler
- Using the Intel® Command-Line Window
- Understanding File Extensions
- Using Makefiles to Compile Your Application
- Using Compiler Options
- Specifying Include Files
- Specifying Object Files
- Specifying Assembly Files
- Modifying Projects to Use a Selected Compiler from the Command Line
- Using Eclipse* (Linux* OS)
- Overview: Eclipse* Integration
- Adding the Compiler to Eclipse*
- Multi-version Compiler Support
- Using Cheat Sheets
- Creating a Simple Project
- Make Files
- Updating a Project to Use the Intel® C++ Compiler
- Using Intel® Performance Libraries
- Using Guided Auto Parallelism in the Eclipse* IDE
- Reusing Guided Auto Parallelism Configurations
- Dialog Box Help
- Using Microsoft* Visual Studio* (Windows* OS)
- Creating a New Project
- Using the Intel® C++ Compiler
- Building Your Intel® C++ Project
- Selecting the Compiler Version
- Switching Back to the Visual C++* Compiler
- Selecting a Configuration
- Specifying a Target Platform
- Specifying Directory Paths
- Specifying a Base Platform Toolset with the Intel® C++ Compiler
- Using Property Pages
- Using Intel® Performance Libraries
- Changing the Selected Intel® Performance Libraries
- Including MPI Support
- Using Guided Auto Parallelism in Visual Studio*
- Using Code Coverage in Visual Studio*
- Using Profile Guided Optimization in Visual Studio*
- Using the Performance Guide
- Using Static Analysis in Visual Studio*
- Performing Parallel Project Builds
- Optimization Reports: Enabling in Visual Studio*
- Optimization Reports: Viewing
- Dialog Box Help
- Options: Compilers dialog box
- Options: Intel® Performance Libraries dialog box
- Use Intel® C++ dialog box
- Options: Performance Guide dialog box
- Performance Guide Use Intel® C++ Compiler dialog box
- Performance Guide Select a Configuration dialog box
- Performance Guide Options Selector dialog box
- Options: Guided Auto Parallelism dialog box
- Profile Guided Optimization dialog box
- Options: Profile Guided Optimization (PGO) dialog box
- Configure Analysis dialog box
- Options: Converter dialog box
- Static Analysis Create Configuration dialog box
- Code Coverage dialog box
- Options: Code Coverage dialog box
- Code Coverage Settings dialog box
- Options: Optimization Reports dialog box
- Using Xcode* (OS X*)
- Key Features
- Intel® Graphics Technology
- Overview: Intel® Graphics Technology
- Programming for Intel® Graphics Technology
- Overview: Heterogeneous Programming for Intel® Graphics Technology
- Initiating an Offload on Intel® Graphics Technology
- Writing Target-Specific Code for Intel® Graphics Technology
- Vectorizing for Intel® Graphics Technology
- Managing Memory Allocation on the Target for Pointer Variables
- Memory Access Considerations
- Writing Target Code that Should Not Be Built for CPU-Only Execution
- Restrictions on Offloaded Code for Intel® Graphics Technology
- Allocating Variables and Arrays Efficiently
- Placing Variables and Functions on the Processor Graphics
- Reduction Functions for Intel® Graphics Technology
- Optimizing Iterative Offload
- Fully Using Parallelism Specific to Intel® Graphics Technology
- Asynchronous Offloading for Intel® Graphics Technology
- Built-in Functions for Intel® Graphics Technology
- Intel® Graphics Technology Supported CPU Functions
- Runtime Diagnostics, and Monitoring
- Intel® Many Integrated Core Architecture (Intel® MIC Architecture)
- Overview: Intel® MIC Architecture
- Programming for Intel® MIC Architecture
- Overview: Heterogeneous Programming
- Dealing with Multiple Coprocessors in a System
- Offload Using a Pragma
- Overview: Using a Pragma
- Initiating an Offload
- Placing Variables and Functions on the Coprocessor
- Managing Memory Allocation for Pointer Variables
- Writing Target-Specific Code Using a Pragma
- Writing Code that Should Not Be Built for CPU-Only Execution
- Allocating Memory for Parts of Arrays
- Moving Data from One Variable to Another
- Restrictions on Offloaded Code Using a Pragma
- Offload Using Shared Virtual Memory
- Restrictions When Programming on Windows* for Intel® MIC Architecture
- About Asynchronous Computation
- About Asynchronous Data Transfer
- Applying the target Attribute to Multiple Declarations
- Controlling the Coprocessor's Execution Environment
- Using Libraries With Offloaded Code
- About Creating Offload Libraries with xiar and xild
- Special Cases
- OpenMP* Considerations
- Data Alignment for Intel® MIC Architecture
- Generating an Offload Report
- _Offload_report
- Calling exit() From an Offload Region
- Building for Intel® MIC Architecture
- Automatically-Aligned Dynamic Allocation
- Automatic Parallelization
- Guided Auto Parallelism
- Guided Auto Parallelism Overview
- Using Guided Auto Parallelism
- Guided Auto Parallelism Messages
- Guided Auto Parallelism Messages Overview
- GAP Message (Diagnostic ID 30506)
- GAP Message (Diagnostic ID 30513)
- GAP Message (Diagnostic ID 30515)
- GAP Message (Diagnostic ID 30519)
- GAP Message (Diagnostic ID 30521)
- GAP Message (Diagnostic ID 30522)
- GAP Message (Diagnostic ID 30523)
- GAP Message (Diagnostic ID 30525)
- GAP Message (Diagnostic ID 30526)
- GAP Message (Diagnostic ID 30528)
- GAP Message (Diagnostic ID 30531)
- GAP Message (Diagnostic ID 30532)
- GAP Message (Diagnostic ID 30533)
- GAP Message (Diagnostic ID 30534)
- GAP Message (Diagnostic ID 30535)
- GAP Message (Diagnostic ID 30536)
- GAP Message (Diagnostic ID 30537)
- GAP Message (Diagnostic ID 30538)
- GAP Message (Diagnostic ID 30753)
- GAP Message (Diagnostic ID 30754)
- GAP Message (Diagnostic ID 30755)
- GAP Message (Diagnostic ID 30756)
- GAP Message (Diagnostic ID 30757)
- GAP Message (Diagnostic ID 30758)
- GAP Message (Diagnostic ID 30759)
- GAP Message (Diagnostic ID 30760)
- Automatic Vectorization
- High-Level Optimization (HLO)
- Intel(R) Cilk(TM) Plus
- Introduction
- Build, Run and Debug an Intel(R) Cilk(TM) Plus Program
- Intel(R) Cilk(TM) Plus Keywords
- Intel(R) Cilk(TM) Plus Execution Model
- Reducers
- Holders
- Operating System Considerations
- Intel(R) Cilk(TM) Plus Run Time System API
- Understanding Race Conditions
- Introduction to Using Locks
- Performance Considerations for Intel(R) Cilk(TM) Plus Programs
- Vectorizing a Loop Using the _Simd Keyword
- Extensions for Array Notation
- SIMD-Enabled Functions
- Glossary
- Intel® Math Library
- Interprocedural Optimization (IPO)
- OpenMP* Support
- OpenMP* Support Overview
- OpenMP* Source Compatibility and Interoperability with Other Compilers
- Adding OpenMP* Support to your Application
- Parallel Processing Model
- Worksharing Using OpenMP*
- Controlling Thread Allocation on the Intel® Xeon Phi™ Coprocessor
- OpenMP* Pragmas and Clauses Summary
- OpenMP* Library Support
- OpenMP* Advanced Issues
- OpenMP* Examples
- Performance Guide (Windows*)
- Performance Guide Overview (Windows*)
- Performance Guide Setup and Workflow (Windows*)
- Starting the Performance Guide (Windows*)
- Using the Performance Guide Workflow Window (Windows*)
- Using the Performance Guide Run All Steps Mode (Windows*)
- Using the Performance Guide Check Performance Measurements Window (Windows*)
- Other Performance-Related Tools (Windows*)
- Pointer Checker
- Pointer Checker Overview
- Pointer Checker Feature Summary
- Using the Pointer Checker
- Checking Bounds
- Checking for Dangling Pointers
- Checking Arrays
- Working with Enabled and Non-Enabled Modules
- Storing Bounds Information
- Passing and Returning Bounds
- Checking Run-Time Library Functions
- Writing a Wrapper
- Checking Custom Memory Allocators
- Checking Multi-Threaded Code
- How the Compiler Defines Bounds Information for Pointers
- Finding and Reporting Out-of-Bounds Errors
- Processor Targeting
- Profile-Guided Optimization (PGO)
- Static Analysis
- Tools
- Intel® Graphics Technology
- Compatibility and Portability
- Conformance to the C/C++ Standards
- GCC* Compatibility and Interoperability
- CLANG Compatibility and Support
- Microsoft Compatibility
- Portability
- Compilation
- Supported Environment Variables
- Compilation Phases
- Passing Options to the Linker
- Linking Tools and Options
- Specifying Alternate Tools and Paths
- Using Configuration Files
- Using Response Files
- Global Symbols and Visibility Attributes (Linux* and OS X*)
- Specifying Symbol Visibility Explicitly (Linux* and OS X*)
- Saving Compiler Information in Your Executable
- Linking Debug Information
- Compiler Reference
- C/C++ Calling Conventions
- Compiler Options
- Introduction to Compiler Options
- New Options
- Deprecated and Removed Compiler Options
- Ways to Display Certain Option Lists
- Compiler Option Categories and Descriptions
- Compiler Option Descriptions and General Rules
- Offload Options
- Optimization Options
- Code Generation Options
- Interprocedural Optimization (IPO) Options
- Advanced Optimization Options
- alias-const, Qalias-const
- ansi-alias, Qansi-alias
- ansi-alias-check, Qansi-alias-check
- cilk-serialize, Qcilk-serialize
- complex-limited-range, Qcomplex-limited-range
- fargument-alias, Qalias-args
- fargument-noalias-global
- ffreestanding, Qfreestanding
- fjump-tables
- ftls-model
- funroll-all-loops
- guide, Qguide
- guide-data-trans, Qguide-data-trans
- guide-file, Qguide-file
- guide-file-append, Qguide-file-append
- guide-opts, Qguide-opts
- guide-par, Qguide-par
- guide-profile, Qguide-profile
- guide-vec, Qguide-vec
- ipp, Qipp
- ipp-link, Qipp-link
- mkl, Qmkl
- qopt-args-in-regs, Qopt-args-in-regs
- qopt-assume-safe-padding, Qopt-assume-safe-padding
- qopt-block-factor, Qopt-block-factor
- qopt-calloc
- qopt-class-analysis, Qopt-class-analysis
- qopt-dynamic-align, Qopt-dynamic-align
- qopt-gather-scatter-unroll, Qopt-gather-scatter-unroll
- qopt-jump-tables, Qopt-jump-tables
- qopt-malloc-options
- qopt-matmul, Qopt-matmul
- qopt-mem-layout-trans, Qopt-mem-layout-trans
- qopt-multi-version-aggressive, Qopt-multi-version-aggressive
- qopt-prefetch, Qopt-prefetch
- qopt-prefetch-distance, Qopt-prefetch-distance
- qopt-ra-region-strategy, Qopt-ra-region-strategy
- qopt-streaming-cache-evict, Qopt-streaming-cache-evict
- qopt-streaming-stores, Qopt-streaming-stores
- qopt-subscript-in-range, Qopt-subscript-in-range
- qopt-threads-per-core, Qopt-threads-per-core
- Qvla
- scalar-rep, Qscalar-rep
- simd, Qsimd
- tbb, Qtbb
- unroll, Qunroll
- unroll-aggressive, Qunroll-aggressive
- use-intel-optimized-headers, Quse-intel-optimized-headers
- vec, Qvec
- vec-guard-write, Qvec-guard-write
- vec-threshold, Qvec-threshold
- vecabi, Qvecabi
- Profile Guided Optimization (PGO) Options
- finstrument-functions, Qinstrument-functions
- Gh
- GH
- p
- prof-data-order, Qprof-data-order
- prof-dir, Qprof-dir
- prof-file, Qprof-file
- prof-func-groups
- prof-func-order, Qprof-func-order
- prof-gen, Qprof-gen
- prof-hotness-threshold, Qprof-hotness-threshold
- prof-src-dir, Qprof-src-dir
- prof-src-root, Qprof-src-root
- prof-src-root-cwd, Qprof-src-root-cwd
- prof-use, Qprof-use
- prof-value-profiling, Qprof-value-profiling
- profile-functions, Qprofile-functions
- profile-loops, Qprofile-loops
- profile-loops-report, Qprofile-loops-report
- Qcov-dir
- Qcov-file
- Qcov-gen
- Qfnsplit
- Optimization Report Options
- qopt-report, Qopt-report
- qopt-report-embed, Qopt-report-embed
- qopt-report-file, Qopt-report-file
- qopt-report-filter, Qopt-report-filter
- qopt-report-format, Qopt-report-format
- qopt-report-help, Qopt-report-help
- qopt-report-per-object, Qopt-report-per-object
- qopt-report-phase, Qopt-report-phase
- qopt-report-routine, Qopt-report-routine
- qopt-report-names, Qopt-report-names
- tcheck, Qtcheck
- tcollect, Qtcollect
- tcollect-filter, Qtcollect-filter
- vec-report, Qvec-report
- OpenMP* and Parallel Processing Options
- fmpc-privatize
- par-affinity, Qpar-affinity
- par-num-threads, Qpar-num-threads
- par-report, Qpar-report
- par-runtime-control, Qpar-runtime-control
- par-schedule, Qpar-schedule
- par-threshold, Qpar-threshold
- parallel, Qparallel
- parallel-source-info, Qparallel-source-info
- qopenmp, Qopenmp
- qopenmp-lib, Qopenmp-lib
- qopenmp-link
- qopenmp-offload, Qopenmp-offload
- qopenmp-report, Qopenmp-report
- qopenmp-simd, Qopenmp-simd
- qopenmp-stubs, Qopenmp-stubs
- qopenmp-task, Qopenmp-task
- qopenmp-threadprivate, Qopenmp-threadprivate
- Qpar-adjust-stack
- Floating-Point Options
- fast-transcendentals, Qfast-transcendentals
- fimf-absolute-error, Qimf-absolute-error
- fimf-accuracy-bits, Qimf-accuracy-bits
- fimf-arch-consistency, Qimf-arch-consistency
- fimf-domain-exclusion, Qimf-domain-exclusion
- fimf-max-error, Qimf-max-error
- fimf-precision, Qimf-precision
- fma, Qfma
- -model, fp
- fp-port, Qfp-port
- fp-speculation, Qfp-speculation
- fp-stack-check, Qfp-stack-check
- fp-trap, Qfp-trap
- fp-trap-all, Qfp-trap-all
- ftz, Qftz
- Ge
- mp1, Qprec
- pc, Qpc
- prec-div, Qprec-div
- prec-sqrt, Qprec-sqrt
- rcd, Qrcd
- Inlining Options
- fgnu89-inline
- finline
- finline-functions
- finline-limit
- inline-calloc, Qinline-calloc
- inline-factor, Qinline-factor
- inline-forceinline, Qinline-forceinline
- inline-level, Ob
- inline-max-per-compile, Qinline-max-per-compile
- inline-max-per-routine, Qinline-max-per-routine
- inline-max-size, Qinline-max-size
- inline-max-total-size, Qinline-max-total-size
- inline-min-size, Qinline-min-size
- Qinline-dllimport
- Output, Debug, and Precompiled Header (PCH) Options
- c
- debug (Linux* and OS X*)
- debug (Windows*)
- Fa
- FA
- fasm-blocks
- FC
- fcode-asm
- Fd
- FD
- Fe
- feliminate-unused-debug-types, Qeliminate-unused-debug-types
- femit-class-debug-always
- fmerge-constants
- fmerge-debug-strings
- Fo
- Fp
- Fr
- FR
- fsource-asm
- ftrapuv, Qtrapuv
- fverbose-asm
- g, Zi, Z7
- g0
- gdwarf
- Gm
- grecord-gcc-switches
- map-opts, Qmap-opts
- o
- pch
- pch-create
- pch-dir
- pch-use
- pdbfile
- print-multi-lib
- Qpchi
- Quse-msasm-symbols
- RTC
- S
- use-asm, Quse-asm
- use-msasm
- V (Windows*)
- Y-
- Yc
- Yd
- Yu
- ZI
- Preprocessor Options
- Component Control Options
- Language Options
- ansi
- check
- check-uninit
- early-template-check
- fblocks
- ffriend-injection
- fno-gnu-keywords
- fno-implicit-inline-templates
- fno-implicit-templates
- fno-operator-names
- fno-rtti
- fnon-lvalue-assign
- fpermissive
- fshort-enums
- fsyntax-only
- ftemplate-depth, Qtemplate-depth
- funsigned-bitfields
- funsigned-char
- GZ
- H (Windows*)
- help-pragma, Qhelp-pragma
- intel-extensions, Qintel-extensions
- J
- restrict, Qrestrict
- std, Qstd
- strict-ansi
- vd
- vmb
- vmg
- vmm
- vms
- x (type option)
- Za
- Zc
- Ze
- Zg
- Zp
- Zs
- Data Options
- align
- auto-ilp32, Qauto-ilp32
- auto-p32
- check-pointers, Qcheck-pointers
- check-pointers-dangling, Qcheck-pointers-dangling
- check-pointers-mpx, Qcheck-pointers-mpx
- check-pointers-narrowing, Qcheck-pointers-narrowing
- check-pointers-undimensioned, Qcheck-pointers-undimensioned
- falign-functions, Qfnalign
- falign-stack
- fcommon
- fextend-arguments, Qextend-arguments
- fkeep-static-consts, Qkeep-static-consts
- fmath-errno
- fminshared
- fmudflap
- fpack-struct
- fpascal-strings
- fpic
- fpie
- freg-struct-return
- fstack-protector-all
- fstack-security-check, GS
- fvisibility
- fvisibility-inlines-hidden
- fzero-initialized-in-bss, Qzero-initialized-in-bss
- GA
- Gs
- GT
- homeparams
- malign-double
- malign-mac68k
- malign-natural
- malign-power
- mcmodel
- mdynamic-no-pic
- mlong-double
- no-bss-init, Qnobss-init
- noBool
- Qlong-double
- Qsfalign
- Compiler Diagnostic Options
- diag, Qdiag
- diag-dump, Qdiag-dump
- diag-enable=power, Qdiag-enable:power
- diag-enable=sc, Qdiag-enable:sc
- diag-enable=sc-enums, Qdiag-enable:sc-enums
- diag-enable=sc-include, Qdiag-enable:sc-include
- diag-enable=sc-single-file, Qdiag-enable:sc-single-file
- diag-error-limit, Qdiag-error-limit
- diag-file, Qdiag-file
- diag-file-append, Qdiag-file-append
- diag-id-numbers, Qdiag-id-numbers
- diag-once, Qdiag-once
- diag-sc-dir, Qdiag-sc-dir
- fnon-call-exceptions
- traceback
- w
- w, W
- Wabi
- Wall
- Wbrief
- Wcheck
- Wcomment
- Wcontext-limit, Qcontext-limit
- wd, Qwd
- Wdeprecated
- we, Qwe
- Weffc++, Qeffc++
- Werror, WX
- Werror-all
- Wextra-tokens
- Wformat
- Wformat-security
- Wic-pointer
- Winline
- WL
- Wmain
- Wmissing-declarations
- Wmissing-prototypes
- wn, Qwn
- Wnon-virtual-dtor
- wo, Qwo
- Wp64
- Wpch-messages
- Wpointer-arith
- Wport
- wr, Qwr
- Wremarks
- Wreorder
- Wreturn-type
- Wshadow
- Wsign-compare
- Wstrict-aliasing
- Wstrict-prototypes
- Wtrigraphs
- Wuninitialized
- Wunknown-pragmas
- Wunused-function
- Wunused-variable
- ww, Qww
- Wwrite-strings
- Compatibility Options
- Linking or Linker Options
- Bdynamic
- Bstatic
- Bsymbolic
- Bsymbolic-functions
- cxxlib
- dynamic-linker
- dynamiclib
- F (Windows*)
- F (OS X*)
- fixed
- Fm
- l
- L
- LD
- link
- MD
- MT
- no-libgcc
- nodefaultlibs
- nostartfiles
- nostdlib
- pie
- pthread
- shared
- shared-intel
- shared-libgcc
- static
- static-intel
- static-libgcc
- static-libstdc++
- staticlib
- T
- u (Linux*)
- v
- Wa
- Wl
- Wp
- Xlinker
- Zl
- Miscellaneous Options
- Alternate Compiler Options
- Related Options
- Floating-point Operations
- Attributes
- Intrinsics
- Overview
- Intrinsics for All Intel® Architectures
- Data Alignment, Memory Allocation Intrinsics, and Inline Assembly
- Intrinsics for Managing Extended Processor States and Registers
- Intrinsics for Intel® Many Integrated Core Architecture (Intel® MIC Architecture)
- Overview: Reference for Intrinsics Supporting Intel® Initial Many Core Instructions (Intel® IMCI)
- Details of Intrinsic Functions for Intel® Many Integrated Core Architecture (Intel® MIC Architecture)
- Shuffle Intrinsics
- _mm512_swizzle_ps/ _mm512_mask_swizzle_ps
- _mm512_swizzle_epi32/ _mm512_mask_swizzle_epi32
- _mm512_swizzle_pd/ _mm512_mask_swizzle_pd
- _mm512_swizzle_epi64/ _mm512_mask_swizzle_epi64
- _mm512_shuffle_epi32/ _mm512_mask_shuffle_epi32
- _mm512_permute4f128_ps/_mm512_mask_permute4f128_ps
- _mm512_permute4f128_epi32/ _mm512_mask_permute4f128_epi32
- _mm512_permutevar_epi32/ _mm512_mask_permutevar_epi32
- Vector Intrinsics
- Overview: Vector Operations
- Arithmetic Intrinsics
- Addition Operations
- _mm512_add_epi32/ _mm512_mask_add_epi32
- _mm512_add_epi64/ _mm512_mask_add_epi64
- _mm512_add_ps/ _mm512_mask_add_ps
- _mm512_add_pd/ _mm512_mask_add_pd
- _mm512_addn_ps/ _mm512_mask_addn_ps
- _mm512_addn_pd/ _mm512_mask_addn_pd
- _mm512_addsets_epi32/ _mm512_mask_addsets_epi32
- _mm512_addsets_ps/ _mm512_mask_addsets_ps
- _mm512_addsetc_epi32/ _mm512_mask_addsetc_epi32
- _mm512_adc_epi32/ _mm512_mask_adc_epi32
- _mm512_addn_round_pd/ _mm512_mask_addn_round_pd
- _mm512_addn_round_ps/ _mm512_mask_addn_round_ps
- _mm512_add_round_pd/ _mm512_mask_add_round_pd
- _mm512_add_round_ps/ _mm512_mask_add_round_ps
- _mm512_addsets_round_ps/ _mm512_mask_addsets_round_ps
- Multiplication Operations
- _mm512_fmadd_ps/ _mm512_fmadd_round_ps/ _mm512_mask_fmadd_ps/ _mm512_mask_fmadd_round_ps/ _mm512_mask3_fmadd_ps/ _mm512_mask3_fmadd_round_ps
- _mm512_fmadd_pd/ _mm512_fmadd_round_pd/ _mm512_mask_fmadd_pd/ _mm512_mask_fmadd_round_pd/ _mm512_mask3_fmadd_pd/ _mm512_mask3_fmadd_round_pd
- _mm512_fmadd_epi32/ _mm512_mask_fmadd_epi32/ _mm512_mask3_fmadd_epi32
- _mm512_fmadd233_epi32/ _mm512_mask_fmadd233_epi32
- _mm512_fmadd233_ps/ _mm512_mask_fmadd233_ps/ _mm512_fmadd233_round_ps/ _mm512_mask_fmadd233_round_ps
- _mm512_fnmadd_ps/ _mm512_fnmadd_round_ps/ _mm512_mask_fnmadd_ps/ _mm512_mask3_fnmadd_ps/ _mm512_mask_fnmadd_round_ps/ _mm512_mask3_fnmadd_round_ps
- _mm512_fnmadd_pd/ _mm512_fnmadd_round_pd/ _mm512_mask_fnmadd_pd/ _mm512_mask3_fnmadd_pd/ _mm512_mask_fnmadd_round_pd/ _mm512_mask3_fnmadd_round_pd
- _mm512_fmsub_ps/ _mm512_fmsub_round_ps/ _mm512_mask_fmsub_ps/ _mm512_mask_fmsub_round_ps/ _mm512_mask3_fmsub_ps/ _mm512_mask3_fmsub_round_ps
- _mm512_fmsub_pd/ _mm512_fmsub_round_pd/ _mm512_mask_fmsub_pd/ _mm512_mask_fmsub_round_pd/ _mm512_mask3_fmsub_pd/ _mm512_mask3_fmsub_round_pd
- _mm512_fnmsub_ps/ _mm512_fnmsub_round_ps/ _mm512_mask_fnmsub_ps/ _mm512_mask3_fnmsub_ps/ _mm512_mask_fnmsub_round_ps/ _mm512_mask3_fnmsub_round_ps
- _mm512_fnmsub_pd/ _mm512_fnmsub_round_pd/ _mm512_mask_fnmsub_pd/ _mm512_mask3_fnmsub_pd/ _mm512_mask_fnmsub_round_pd/ _mm512_mask3_fnmsub_round_pd
- _mm512_mulhi_epi32/ _mm512_mask_mulhi_epi32
- _mm512_mulhi_epu32/ _mm512_mask_mulhi_epu32
- _mm512_mullo_epi32/ _mm512_mask_mullo_epi32
- _mm512_mul_pd/ _mm512_mask_mul_pd
- _mm512_mul_ps/ _mm512_mask_mul_ps
- _mm512_mul_round_pd/ _mm512_mask_mul_round_pd
- _mm512_mul_round_ps/ _mm512_mask_mul_round_ps
- _mm512_scale_ps/ _mm512_mask_scale_ps
- _mm512_scale_round_ps/ _mm512_mask_scale_round_ps
- Subtraction Operations
- _mm512_sub_epi32/ _mm512_mask_sub_epi32
- _mm512_sub_ps/ _mm512_mask_sub_ps
- _mm512_sub_pd/ _mm512_mask_sub_pd
- _mm512_subr_epi32/ _mm512_mask_subr_epi32
- _mm512_subr_pd/ _mm512_mask_subr_pd
- _mm512_subr_ps/ _mm512_mask_subr_ps
- _mm512_sbbr_epi32/ _mm512_mask_sbbr_epi32
- _mm512_subsetb_epi32/ _mm512_mask_subsetb_epi32
- _mm512_subrsetb_epi32/ _mm512_mask_subrsetb_epi32
- _mm512_sbb_epi32/_m512_mask_sbb_epi32
- _mm512_sub_round_pd/ _mm512_mask_sub_round_pd
- _mm512_sub_round_ps/ _mm512_mask_sub_round_ps
- _mm512_subr_round_pd/ _mm512_mask_subr_round_pd
- _mm512_subr_round_ps/ _mm512_mask_subr_round_ps
- Addition Operations
- Bitwise Intrinsics
- _mm512_and_epi32/ _mm512_mask_and_epi32
- _mm512_and_epi64/ _mm512_mask_and_epi64
- _mm512_andnot_epi32/ _mm512_mask_andnot_epi32
- _mm512_andnot_epi64/ _mm512_mask_andnot_epi64
- _mm512_or_epi32/ _mm512_mask_or_epi32
- _mm512_or_epi64/ _mm512_mask_or_epi64
- _mm512_test_epi32_mask/ _mm512_mask_test_epi32_mask
- _mm512_xor_epi32/ _mm512_mask_xor_epi32
- _mm512_xor_epi64/ _mm512_mask_xor_epi64
- Compare Intrinsics
- Conversion Intrinsics
- _mm512_cvtpd_pslo/ _mm512_mask_cvtpd_pslo
- _mm512_cvt_roundpd_pslo/ _mm512_mask_cvt_roundpd_pslo
- _mm512_cvt_roundpd_epi32lo/ _mm512_mask_cvt_roundpd_epi32lo
- _mm512_cvtfxpnt_roundpd_epu32lo/ _mm512_mask_cvtfxpnt_roundpd_epu32lo
- _mm512_cvtpslo_pd/ _mm512_mask_cvtpslo_pd
- _mm512_cvtepu32lo_pd/ _mm512_mask_cvtepu32lo_pd
- _mm512_cvtepi32lo_pd/ _mm512_mask_cvtepi32lo_pd
- _mm512_cvtfxpnt_round_adjustepu32_ps/ _mm512_mask_cvtfxpnt_round_adjustepu32_ps
- _mm512_cvtfxpnt_round_adjustps_epi32/ _mm512_mask_cvtfxpnt_round_adjustps_epi32
- _mm512_cvtfxpnt_round_adjustps_epu32/ _mm512_mask_cvtfxpnt_round_adjustps_epu32
- _mm512_cvtfxpnt_round_adjustepu32_ps/ _mm512_mask_cvtfxpnt_round_adjustepu32_ps
- _mm512_round_ps/ _mm512_mask_round_ps
- Load Intrinsics
- _mm512_extload_ps/ _mm512_mask_extload_ps
- _mm512_load_ps/ _mm512_mask_load_ps
- _mm512_extload_epi32/ _mm512_mask_extload_epi32
- _mm512_load_epi32/ _mm512_mask_load_epi32
- _mm512_extload_pd/ _mm512_mask_extload_pd
- _mm512_load_pd/ _mm512_mask_load_pd
- _mm512_extload_epi64/ _mm512_mask_extload_epi64
- _mm512_load_epi64/ _mm512_mask_load_epi64
- _mm512_loadunpackhi_epi32/ _mm512_mask_loadunpackhi_epi32
- _mm512_extloadunpackhi_epi32/ _mm512_mask_extloadunpackhi_epi32
- _mm512_loadunpacklo_epi32/ _mm512_mask_loadunpacklo_epi32
- _mm512_extloadunpacklo_epi32/ _mm512_mask_extloadunpacklo_epi32
- _mm512_loadunpackhi_epi64/ _mm512_mask_loadunpackhi_epi64
- _mm512_extloadunpackhi_epi64/ _mm512_mask_extloadunpackhi_epi64
- _mm512_loadunpacklo_epi64/ _mm512_mask_loadunpacklo_epi64
- _mm512_extloadunpacklo_epi64/ _mm512_mask_extloadunpacklo_epi64
- _mm512_loadunpackhi_ps/ _mm512_mask_loadunpackhi_ps
- _mm512_extloadunpackhi_ps/ _mm512_mask_extloadunpackhi_ps
- _mm512_loadunpacklo_ps/ _mm512_mask_loadunpacklo_ps
- _mm512_extloadunpacklo_ps/ _mm512_mask_extloadunpacklo_ps
- _mm512_loadunpackhi_pd/ _mm512_mask_loadunpackhi_pd
- _mm512_extloadunpackhi_pd/ _mm512_mask_extloadunpackhi_pd
- _mm512_loadunpacklo_pd/ _mm512_mask_loadunpacklo_pd
- _mm512_extloadunpacklo_pd/ _mm512_mask_extloadunpacklo_pd
- Gather and Scatter Intrinsics
- _mm512_i32[ext]gather_ps/ _mm512_mask_i32[ext]gather_ps
- _mm512_i32[ext]gather_epi32/ _mm512_mask_i32[ext]gather_epi32
- _mm512_i32lo[ext]gather_pd/ _mm512_mask_i32lo[ext]gather_pd
- _mm512_i32lo[ext]gather_epi64/_mm512_mask_i32lo[ext]gather_epi64
- _mm512_prefetch_i32[ext]gather_ps/ _mm512_mask_prefetch_i32[ext]gather_ps
- _mm512_i32[ext]scatter_ps/ _mm512_mask_i32[ext]scatter_ps
- _mm512_i32[ext]scatter_epi32/ _mm512_mask_i32[ext]scatter_epi32
- _mm512_i32lo[ext]scatter_pd/ _mm512_mask_i32lo[ext]scatter_pd
- _mm512_i32lo[ext]scatter_epi64/ _mm512_mask_i32lo[ext]scatter_epi64
- _mm512_prefetch_i32[ext]scatter_ps/ _mm512_mask_prefetch_i32[ext]scatter_ps
- _mm512_i64[ext]gather_pslo/ _mm512_mask_i64[ext]gather_pslo
- _mm512_i64[ext]gather_epi32lo/ _mm512_mask_i64[ext]gather_epi32lo
- _mm512_i64[ext]gather_pd/ _mm512_mask_i64[ext]gather_pd
- _mm512_i64[ext]gather_epi64/_mm512_mask_i64[ext]gather_epi64
- _mm512_i64[ext]scatter_pslo/ _mm512_mask_i64[ext]scatter_pslo
- _mm512_i64[ext]scatter_epi32lo/ _mm512_mask_i64[ext]scatter_epi32lo
- _mm512_i64[ext]scatter_pd/ _mm512_mask_i64[ext]scatter_pd
- _mm512_i64[ext]scatter_epi64/ _mm512_mask_i64[ext]scatter_epi64
- Intrinsics to Determine Minimum and Maximum Operations
- _mm512_[g]maxabs_ps/ _mm512_mask_[g]maxabs_ps
- _mm512_gmax_pd/ _mm512_mask_gmax_pd
- _mm512_max_pd/ _mm512_mask_max_pd
- _mm512_gmax_ps/ _mm512_mask_gmax_ps
- _mm512_max_ps/ _mm512_mask_max_ps
- _mm512_max_epi32/ _mm512_mask_max_epi32
- _mm512_max_epu32/ _mm512_mask_max_epu32
- _mm512_gmin_pd/ _mm512_mask_gmin_pd
- _mm512_min_pd/ _mm512_mask_min_pd
- _mm512_gmin_ps/ _mm512_mask_gmin_ps
- _mm512_min_ps/ _mm512_mask_min_ps
- _mm512_min_epi32/ _mm512_mask_min_epi32
- _mm512_min_epu32/ _mm512_mask_min_epu32
- Miscellaneous Operations
- _mm512_alignr_epi32/ _mm512_mask_alignr_epi32
- _mm512_exp223_ps/ _mm512_mask_exp223_ps
- _mm512_fixupnan_pd/ _mm512_mask_fixupnan_pd
- _mm512_fixupnan_ps/ _mm512_mask_fixupnan_ps
- _mm512_getexp_ps/ _mm512_mask_getexp_ps
- _mm512_getexp_pd/ _mm512_mask_getexp_pd
- _mm512_getmant_pd/ _mm512_mask_getmant_pd
- _mm512_getmant_ps/ _mm512_mask_getmant_ps
- _mm512_log2ae23_ps/ _mm512_mask_log2ae23_ps
- _mm512_rcp23_ps/ _mm512_mask_rcp23_ps
- _mm512_roundfxpnt_adjust_ps/ _mm512_mask_roundfxpnt_adjust_ps
- _mm512_roundfxpnt_adjust_pd/ _mm512_mask_roundfxpnt_adjust_pd
- _mm512_rsqrt23_ps/ _mm512_mask_rsqrt23_ps
- Memory and Initialization Intrinsics
- _mm512_setzero_{pd|ps|epi32}
- _mm512_setr_pd
- _mm512_setr_ps
- _mm512_set1_pd
- _mm512_set1_epi64
- _mm512_set1_ps
- _mm512_set1_epi32
- _mm512_set[r]4_pd
- _mm512_set[r]4_epi64
- _mm512_set[r]4_ps
- _mm512_set[r]4_epi32
- _mm512_set_ps
- _mm512_set_epi32
- _mm512_set_pd
- _mm512_set[r]_epi64
- _mm512_mask_mov{_ps|_epi32}
- _mm512_mask_mov{_pd|_epi64}
- _mm512_undefined_{ps|pd|epi32}
- Shift Intrinsics
- Store Intrinsics
- _mm512_store_ps/_mm512_mask_store_ps
- _mm512_extstore_ps/_mm512_mask_extstore_ps
- _mm512_store_epi32/_mm512_mask_store_epi32
- _mm512_extstore_epi32/_mm512_mask_extstore_epi32
- _mm512_store_pd/_mm512_mask_store_pd
- _mm512_extstore_pd/_mm512_mask_extstore_pd
- _mm512_store_epi64/_mm512_mask_store_epi64
- _mm512_extstore_epi64/_mm512_mask_extstore_epi64
- _mm512_packstorehi_epi32/_mm512_mask_packstorehi_epi32
- _mm512_extpackstorehi_epi32/_mm512_mask_extpackstorehi_epi32
- _mm512_packstorelo_epi32/_mm512_mask_packstorelo_epi32
- _mm512_extpackstorelo_epi32/_mm512_mask_extpackstorelo_epi32
- _mm512_packstorehi_epi64/_mm512_mask_packstorehi_epi64
- _mm512_extpackstorehi_epi64/_mm512_mask_extpackstorehi_epi64
- _mm512_packstorelo_epi64/_mm512_mask_packstorelo_epi64
- _mm512_extpackstorelo_epi64/_mm512_mask_extpackstorelo_epi64
- _mm512_packstorehi_ps/_mm512_mask_packstorehi_ps
- _mm512_extpackstorehi_ps/_mm512_mask_extpackstorehi_ps
- _mm512_packstorelo_ps/_mm512_mask_packstorelo_ps
- _mm512_extpackstorelo_ps/_mm512_mask_extpackstorelo_ps
- _mm512_packstorehi_pd/_mm512_mask_packstorehi_pd
- _mm512_extpackstorehi_pd/_mm512_mask_extpackstorehi_pd
- _mm512_packstorelo_pd/_mm512_mask_packstorelo_pd
- _mm512_extpackstorelo_pd/_mm512_mask_extpackstorelo_pd
- _mm512_storenr_ps
- _mm512_storenr_pd
- _mm512_storenrngo_ps
- _mm512_storenrngo_pd
- Short Vector Math Library Intrinsics
- Overview: SVML Intrinsics
- Division Operations
- _mm512_div_pd/ _mm512_mask_div_pd
- _mm512_div_ps/ _mm512_mask_div_ps
- _mm512_div_epi8
- _mm512_div_epi16
- _mm512_div_epi32/ _mm512_mask_div_epi32
- _mm512_div_epi64
- _mm512_div_epu8
- _mm512_div_epu16
- _mm512_div_epu32/ _mm512_mask_div_epu32
- _mm512_div_epu64
- _mm512_rem_epi8
- _mm512_rem_epi16
- _mm512_rem_epi32/ _mm512_mask_rem_epi32
- _mm512_rem_epi64
- _mm512_rem_epu8
- _mm512_rem_epu32/ _mm512_mask_rem_epu32
- _mm512_rem_epu16
- _mm512_rem_epu64
- Error Function Operations
- _mm512_cdfnorminv_pd, _mm512_mask_cdfnorminv_pd
- _mm512_cdfnorminv_ps, _mm512_mask_cdfnorminv_ps
- _mm512_erf_pd/ _mm512_mask_erf_pd
- _mm512_erf_ps/ _mm512_mask_erf_ps
- _mm512_erfc_pd/ _mm512_mask_erfc_pd
- _mm512_erfc_ps/ _mm512_mask_erfc_ps
- _mm512_erfinv_pd/ _mm512_mask_erfinv_pd
- _mm512_erfinv_ps/ _mm512_mask_erfinv_ps
- Exponential Operations
- _mm512_exp10_pd, _mm512_mask_exp10_pd
- _mm512_exp10_ps, _mm512_mask_exp10_ps
- _mm512_exp2_pd/ _mm512_mask_exp2_pd
- _mm512_exp2_ps/ _mm512_mask_exp2_ps
- _mm512_exp_pd/ _mm512_mask_exp_pd
- _mm512_exp_ps/ _mm512_mask_exp_ps
- _mm512_expm1_pd, _mm512_mask_expm1_pd
- _mm512_expm1_ps, _mm512_mask_expm1_ps
- _mm512_pow_pd/ _mm512_mask_pow_pd
- _mm512_pow_ps/ _mm512_mask_pow_ps
- Logarithmic Operations
- _mm512_log10_pd/ _mm512_mask_log10_pd
- _mm512_log10_ps/ _mm512_mask_log10_ps
- _mm512_log2_pd/ _mm512_mask_log2_pd
- _mm512_log2_ps/ _mm512_mask_log2_ps
- _mm512_log_pd/ _mm512_mask_log_pd
- _mm512_log_ps/ _mm512_mask_log_ps
- _mm512_logb_pd, _mm512_mask_logb_pd
- _mm512_logb_ps, _mm512_mask_logb_ps
- _mm512_log1p_pd, _mm512_mask_log1p_pd
- _mm512_log1p_ps, _mm512_mask_log1p_ps
- Rounding Off Operations
- _mm512_ceil_pd/ _mm512_mask_ceil_pd
- _mm512_ceil_ps/ _mm512_mask_ceil_ps
- _mm512_floor_pd/ _mm512_mask_floor_pd
- _mm512_floor_ps/ _mm512_mask_floor_ps
- _mm512_nearbyint_pd/ _mm512_mask_nearbyint_pd
- _mm512_nearbyint_ps/ _mm512_mask_nearbyint_ps
- _mm512_rint_pd/ _mm512_mask_rint_pd
- _mm512_rint_ps/ _mm512_mask_rint_ps
- _mm512_svml_round_pd/ _mm512_mask_svml_round_pd
- _mm512_trunc_pd/ _mm512_mask_trunc_pd
- _mm512_trunc_ps/ _mm512_mask_trunc_ps
- Square Root and Cube Root Operations
- _mm512_sqrt_pd/ _mm512_mask_sqrt_pd
- _mm512_sqrt_ps/ _mm512_mask_sqrt_ps
- _mm512_invsqrt_pd/ _mm512_mask_invsqrt_pd
- _mm512_invsqrt_ps/ _mm512_mask_invsqrt_ps
- _mm512_hypot_pd/ _mm512_mask_hypot_pd
- _mm512_hypot_ps/ _mm512_mask_hypot_ps
- _mm512_cbrt_pd/ _mm512_mask_cbrt_pd
- _mm512_cbrt_ps/ _mm512_mask_cbrt_ps
- Trigonometric Operations
- _mm512_cos_pd/ _mm512_mask_cos_pd
- _mm512_cos_ps/ _mm512_mask_cos_ps
- _mm512_cosd_pd, _mm512_mask_cosd_pd
- _mm512_cosd_ps, _mm512_mask_cosd_ps
- _mm512_cosh_pd/ _mm512_mask_cosh_pd
- _mm512_cosh_ps/ _mm512_mask_cosh_ps
- _mm512_acos_pd/ _mm512_mask_acos_pd
- _mm512_acos_ps/ _mm512_mask_acos_ps
- _mm512_acosh_pd/ _mm512_mask_acosh_pd
- _mm512_acosh_ps/ _mm512_mask_acosh_ps
- _mm512_sin_pd/ _mm512_mask_sin_pd
- _mm512_sin_ps/ _mm512_mask_sin_ps
- _mm512_sind_pd, _mm512_mask_sind_pd
- _mm512_sind_ps, _mm512_mask_sind_ps
- _mm512_sinh_pd/ _mm512_mask_sinh_pd
- _mm512_sinh_ps/ _mm512_mask_sinh_ps
- _mm512_asin_pd/ _mm512_mask_asin_pd
- _mm512_asin_ps/ _mm512_mask_asin_ps
- _mm512_asinh_pd/ _mm512_mask_asinh_pd
- _mm512_asinh_ps/ _mm512_mask_asinh_ps
- _mm512_tan_pd/ _mm512_mask_tan_pd
- _mm512_tan_ps/ _mm512_mask_tan_ps
- _mm512_tand_pd, _mm512_mask_tand_pd
- _mm512_tand_ps, _mm512_mask_tand_ps
- _mm512_tanh_pd/ _mm512_mask_tanh_pd
- _mm512_tanh_ps/ _mm512_mask_tanh_ps
- _mm512_atan_pd/ _mm512_mask_atan_pd
- _mm512_atan_ps/ _mm512_mask_atan_ps
- _mm512_atanh_pd/ _mm512_mask_atanh_pd
- _mm512_atanh_ps/ _mm512_mask_atanh_ps
- _mm512_atan2_pd/ _mm512_mask_atan2_pd
- _mm512_atan2_ps/ _mm512_mask_atan2_ps
- Type Cast Intrinsics
- Vector Mask Intrinsics
- _mm512_kand
- _mm512_kandn
- _mm512_kandnr
- _mm512_kmovlhb
- _mm512_kmov
- _mm512_knot
- _mm512_kor
- _mm512_kxnor
- _mm512_kxor
- _mm512_kswapb
- _mm512_kortestz
- _mm512_kortestc
- _mm512_mask2int
- _mm512_int2mask
- _mm512_kconcathi_64
- _mm512_kconcatlo_64
- _mm512_kextract_64
- Intrinsics for Intel® Many Integrated Core Architecture (Intel® MIC Architecture)
- Reduction Intrinsics
- Overview: Reduction Intrinsics
- _mm512_reduce_add_ps/_mm512_mask_reduce_add_ps
- _mm512_reduce_add_pd/_mm512_mask_reduce_add_pd
- _mm512_reduce_add_epi32/_mm512_mask_reduce_add_epi32
- _mm512_reduce_and_epi32/_mm512_mask_reduce_and_epi32
- _mm512_reduce_or_epi32/_mm512_mask_reduce_or_epi32
- _mm512_reduce_[g]max_ps/_mm512_mask_reduce_[g]max_ps
- _mm512_reduce_[g]max_pd/_mm512_mask_reduce_[g]max_pd
- _mm512_reduce_max_epi32/_mm512_mask_reduce_max_epi32
- _mm512_reduce_max_epu32/_mm512_mask_reduce_max_epu32
- _mm512_reduce_[g]min_ps/_mm512_mask_reduce_[g]min_ps
- _mm512_reduce_[g]min_pd/_mm512_mask_reduce_[g]min_pd
- _mm512_reduce_min_epi32/_mm512_mask_reduce_min_epi32
- _mm512_reduce_min_epu32/_mm512_mask_reduce_min_epu32
- _mm512_reduce_mul_ps/_mm512_mask_reduce_mul_ps
- _mm512_reduce_mul_pd/_mm512_mask_reduce_mul_pd
- _mm512_reduce_mul_epi32/_mm512_mask_reduce_mul_epi32
- Scalar Intrinsics
- Intrinsics for Intel® Advanced Vector Extensions 512 (Intel® AVX-512) Additional Instructions
- Intrinsics for Arithmetic Operations
- Intrinsics for Bit Manipulation Operations
- Intrinsics for Comparison Operations
- Intrinsics for Conversion Operations
- Intrinsics for Load Operations
- Intrinsics for Logical Operations
- Intrinsics for Miscellaneous Operations
- Intrinsics for Move Operations
- Intrinsics for Set Operations
- Intrinsics for Shift Operations
- Intrinsics for Store Operations
- Intrinsics for Intel® Advanced Vector Extensions 512 (Intel® AVX-512) Instructions
- Overview: Intrinsics for Intel® Advanced Vector Extensions 512 (Intel® AVX-512) Instructions
- Intrinsics for Arithmetic Operations
- Intrinsics for Addition Operations
- Intrinsics for Determining Minimum and Maximum Values
- Intrinsics for FP Fused Multiply-Add (FMA) Operations
- Intrinsics for Multiplication Operations
- Intrinsics for Subtraction Operations
- Intrinsics for Short Vector Math Library (SVML) Operations
- Intrinsics for Division Operations
- Intrinsics for Error Function Operations
- Intrinsics for Exponential Operations
- Intrinsics for Logarithmic Operations
- Intrinsics for Reciprocal Operations
- Intrinsics for Root Function Operations
- Intrinsics for Rounding Operations
- Intrinsics for Trigonometric Operations
- Intrinsics for Other Mathematics Operations
- Intrinsics for Blend Operations
- Intrinsics for Bit Manipulation Operations
- Intrinsics for Broadcast Operations
- Intrinsics for Comparison Operations
- Intrinsics for Compression Operations
- Intrinsics for Conversion Operations
- Intrinsics for Expand and Load Operations
- Intrinsics for Gather and Scatter Operations
- Intrinsics for Insert and Extract Operations
- Intrinsics for Load and Store Operations
- Intrinsics for Miscellaneous Operations
- Intrinsics for Move Operations
- Intrinsics for Pack and Unpack Operations
- Intrinsics for Permutation Operations
- Intrinsics for Reduction Operations
- Intrinsics for Set Operations
- Intrinsics for Shuffle Operations
- Intrinsics for Test Operations
- Intrinsics for Typecast Operations
- Intrinsics for Vector Mask Operations
- Intrinsics for Later Generation Intel® Core™ Processor Instruction Extensions
- Overview: Intrinsics for 3rd Generation Intel® Core™ Processor Instruction Extensions
- Overview: Intrinsics for 4th Generation Intel® Core™ Processor Instruction Extensions
- Intrinsics for Converting Half Floats that Map to 3rd Generation Intel® Core™ Processor Instructions
- Intrinsics that Generate Random Numbers of 16/32/64 Bit Wide Random Integers
- Intrinsics for Multi-Precision Arithmetic
- Intrinsics that Allow Reading from and Writing to the FS Base and GS Base Registers
- Intrinsics for Intel® Advanced Vector Extensions 2
- Overview: Intrinsics for Intel® Advanced Vector Extensions 2 (Intel® AVX2) Instructions
- Intrinsics for Arithmetic Operations
- _mm256_abs_epi8/16/32
- _mm256_add_epi8/16/32/64
- _mm256_adds_epi8/16
- _mm256_adds_epu8/16
- _mm256_sub_epi8/16/32/64
- _mm256_subs_epi8/16
- _mm256_subs_epu8/16
- _mm256_avg_epu8/16
- _mm256_hadd_epi16/32
- _mm256_hadds_epi16
- _mm256_hsub_epi16/32
- _mm256_hsubs_epi16
- _mm256_madd_epi16
- _mm256_maddubs_epi16
- _mm256_mul_epi32
- _mm256_mul_epu32
- _mm256_mulhi_epi16
- _mm256_mulhi_epu16
- _mm256_mullo_epi16/32
- _mm256_mulhrs_epi16
- _mm256_sign_epi8/16/32
- _mm256_mpsadbw_epu8
- _mm256_sad_epu8
- Intrinsics for Arithmetic Shift Operations
- Intrinsics for Blend Operations
- Intrinsics for Bitwise Operations
- Intrinsics for Broadcast Operations
- Intrinsics for Compare Operations
- Intrinsics for Fused Multiply Add Operations
- _mm_fmadd_pd, _mm256_fmadd_pd
- _mm_fmadd_ps, _mm256_fmadd_ps
- _mm_fmadd_sd
- _mm_fmadd_ss
- _mm_fmaddsub_pd, _mm256_fmaddsub_pd
- _mm_fmaddsub_ps, _mm256_fmaddsub_ps
- _mm_fmsub_pd, _mm256_fmsub_pd
- _mm_fmsub_ps, _mm256_fmsub_ps
- _mm_fmsub_sd
- _mm_fmsub_ss
- _mm_fmsubadd_pd, _mm256_fmsubadd_pd
- _mm_fmsubadd_ps, _mm256_fmsubadd_ps
- _mm_fnmadd_pd, _mm256_fnmadd_pd
- _mm_fnmadd_ps, _mm256_fnmadd_ps
- _mm_fnmadd_sd
- _mm_fnmadd_ss
- _mm_fnmsub_pd, _mm256_fnmsub_pd
- _mm_fnmsub_ps, _mm256_fnmsub_ps
- _mm_fnmsub_sd
- _mm_fnmsub_ss
- Intrinsics for GATHER Operations
- _mm_mask_i32gather_pd, _mm256_mask_i32gather_pd
- _mm_i32gather_pd, _mm256_i32gather_pd
- _mm_mask_i64gather_pd, _mm256_mask_i64gather_pd
- _mm_i64gather_pd, _mm256_i64gather_pd
- _mm_mask_i32gather_ps, _mm256_mask_i32gather_ps
- _mm_i32gather_ps, _mm256_i32gather_ps
- _mm_mask_i64gather_ps, _mm256_mask_i64gather_ps
- _mm_i64gather_ps, _mm256_i64gather_ps
- _mm_mask_i32gather_epi32, _mm256_mask_i32gather_epi32
- _mm_i32gather_epi32, _mm256_i32gather_epi32
- _mm_mask_i32gather_epi64,_mm256_mask_i32gather_epi64
- _mm_i32gather_epi64,_mm256_i32gather_epi64
- _mm_mask_i64gather_epi32,_mm256_mask_i64gather_epi32
- _mm_i64gather_epi32,_mm256_i64gather_epi32
- _mm_mask_i64gather_epi64,_mm256_mask_i64gather_epi64
- _mm_i64gather_epi64,_mm256_i64gather_epi64
- Intrinsics for Logical Shift Operations
- Intrinsics for Insert/Extract Operations
- Intrinsics for Masked Load/Store Operations
- Intrinsics for Miscellaneous Operations
- Intrinsics for Operations to Manipulate Integer Data at Bit-Granularity
- Intrinsics for Pack/Unpack Operations
- Intrinsics for Packed Move with Extend Operations
- Intrinsics for Permute Operations
- Intrinsics for Shuffle Operations
- Intrinsics for Intel® Transactional Synchronization Extensions (Intel® TSX)
- Intel® Transactional Synchronization Extensions (Intel® TSX) Overview
- Intel® Transactional Synchronization Extensions (Intel® TSX) Programming Considerations
- Intrinsics for Restricted Transactional Memory Operations
- Intrinsics for Hardware Lock Elision Operations
- Function Prototype and Macro Definitions
- Intrinsics for Intel® Advanced Vector Extensions
- Overview: Intrinsics for Intel® Advanced Vector Extensions Instructions
- Details of Intel® Advanced Vector Extensions Intrinsics
- Intrinsics for Arithmetic Operations
- Intrinsics for Bitwise Operations
- Intrinsics for Blend and Conditional Merge Operations
- Intrinsics for Compare Operations
- Intrinsics for Conversion Operations
- Intrinsics to Determine Minimum and Maximum Values
- Intrinsics for Load and Store Operations
- _mm256_broadcast_pd
- _mm256_broadcast_ps
- _mm256_broadcast_sd
- _mm256_broadcast_ss, _mm_broadcast_ss
- _mm256_load_pd
- _mm256_load_ps
- _mm256_load_si256
- _mm256_loadu_pd
- _mm256_loadu_ps
- _mm256_loadu_si256
- _mm256_maskload_pd, _mm_maskload_pd
- _mm256_maskload_ps, _mm_maskload_ps
- _mm256_store_pd
- _mm256_store_ps
- _mm256_store_si256
- _mm256_storeu_pd
- _mm256_storeu_ps
- _mm256_storeu_si256
- _mm256_stream_pd
- _mm256_stream_ps
- _mm256_stream_si256
- _mm256_maskstore_pd, _mm_maskstore_pd
- _mm256_maskstore_ps, _mm_maskstore_ps
- Intrinsics for Miscellaneous Operations
- _mm256_extractf128_pd
- _mm256_extractf128_ps
- _mm256_extractf128_si256
- _mm256_insertf128_pd
- _mm256_insertf128_ps
- _mm256_insertf128_si256
- _mm256_lddqu_si256
- _mm256_movedup_pd
- _mm256_movehdup_ps
- _mm256_moveldup_ps
- _mm256_movemask_pd
- _mm256_movemask_ps
- _mm256_round_pd
- _mm256_round_ps
- _mm256_set_pd
- _mm256_set_ps
- _mm256_set_epi32
- _mm256_setr_pd
- _mm256_setr_ps
- _mm256_setr_epi32
- _mm256_set1_pd
- _mm256_set1_ps
- _mm256_set1_epi32
- _mm256_setzero_pd
- _mm256_setzero_ps
- _mm256_setzero_si256
- _mm256_zeroall
- _mm256_zeroupper
- Intrinsics for Packed Test Operations
- Intrinsics for Permute Operations
- Intrinsics for Shuffle Operations
- Intrinsics for Unpack and Interleave Operations
- Support Intrinsics for Vector Typecasting Operations
- Intrinsics Generating Vectors of Undefined Values
- Intrinsics for Intel® Streaming SIMD Extensions 4 (Intel® SSE4)
- Overview: Intel® Streaming SIMD Extensions 4 (Intel® SSE4)
- Efficient Accelerated String and Text Processing
- Vectorizing Compiler and Media Accelerators
- Overview: Vectorizing Compiler and Media Accelerators
- Packed Blending Intrinsics
- Floating Point Dot Product Intrinsics
- Packed Format Conversion Intrinsics
- Packed Integer Min/Max Intrinsics
- Floating Point Rounding Intrinsics
- DWORD Multiply Intrinsics
- Register Insertion/Extraction Intrinsics
- Test Intrinsics
- Packed DWORD to Unsigned WORD Intrinsic
- Packed Compare for Equal Intrinsic
- Cacheability Support Intrinsic
- Intrinsics for Intel® Supplemental Streaming SIMD Extensions 3 (SSSE3)
- Intrinsics for Intel® Streaming SIMD Extensions 3 (Intel® SSE3)
- Intrinsics for Intel® Streaming SIMD Extensions 2 (Intel® SSE2)
- Intrinsics for Intel® Streaming SIMD Extensions (Intel® SSE)
- Overview: Intel® Streaming SIMD Extensions (Intel® SSE)
- Details about Intel® Streaming SIMD Extensions Intrinsics
- Writing Programs with Intel® Streaming SIMD Extensions (Intel® SSE) Intrinsics
- Arithmetic Intrinsics
- Logical Intrinsics
- Compare Intrinsics
- Conversion Intrinsics
- Load Intrinsics
- Set Intrinsics
- Store Intrinsics
- Cacheability Support Intrinsics
- Integer Intrinsics
- Intrinsics to Read and Write Registers
- Miscellaneous Intrinsics
- Macro Functions
- MMX™ Technology Intrinsics