Trace Layout Guidelines

This section details key layout information for single-ended and differential traces.

Single-Ended Trace Information

If the Minimum Trace column only has one spacing-to-width ratio, both signals have the same space requirements.

The Typical Signal Loss column presents the specific loss of signal for each interface at the 500-MHz level.

The Kb column describes the coefficient of maximum near-end crosstalk or backwards crosstalk couple factor. Kb refers to a dimensionless ratio representing the voltages between the victim and aggressor traces.

 

I/O
Interfaces

Zo (Ohm)
±12%

Max. Routing
Length (mils)

Minimum Trace
spacing-to-width ratio

Kb

Typical Signal Loss at Max Routing Length

(dB at 500 MHz)

Topology

Note

SD Card

42-47

3900

s:w=1:1

6.5%

0.94

P2P

1, 2

Crystal Oscillator

42-47

900

s:w=5:1

0.1%

0.24

 

6

GPIO

42-47

7900

s:w=1:1

6.5%

1.87

P2P

 

CLK_19P2M, CODEC_MCLK

42-47

6900

s:w=2:1

2.4%

1.63

P2P

 

I2C

42-47

Less than 400 pF total load

s:w=1:1

6.5%

N/A

 

7

I2S

42-47

5900

s:w=1:1

6.5%

1.4

Multi-load P2P

3, 4

HSUART

42-47

6600

s:w=1:1

6.5%

1.59

P2P

 

SPI

42-47

6600

clk: s:w=2:1
data per frame: s:w=1:1

clk: 2.4%
data: 6.5%

1.59

P2P

5

Notes:

  1. Level shifter is needed, and routing between level shifter and SD card connector should be as short as possible, with a maximum of 500 mils. Refer to level shifter vendor's application note.
  2. The maximum mismatch of data to clock is 500 mils.
  3. The maximum frequency is 4.8 MHz if multi-load is implemented.
  4. The maximum mismatch of clock to data per frame is 1000 mils.
  5. The maximum mismatch of clock to data per frame is 600 mils.
  6. The maximum mismatch is 50 mils.
  7. The maximum mismatch of data to clock is 2000 mils.
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