MRAA Pinmapping

Pinmapping for the breakout connectors can be found in Module Board-to-Board Connector Pinout. The tables below provides the pin assignment, signal name, and description for the signals on the breakout connectors J12 and J13.

These signals are mapped by various operating systems in different ways, and that mapping can be redefined by software methods.

Digital I/O (SPI, I2C, I2S, GPIO, PWM) can be directly controlled from the kernel and more easily controlled by the MRAA library.

Expansion Board Connector J12

Expansion Board Pin Number MRAA Number Physical Pin Function Net Name at Breakout
J12.1

1

GPIO GPIO GPIO_22_LS
J12.2

2

SPP1RX GPIO SPI SPI_1_MISO_LS
J12.3

3

PMICRST NONE PMIC_RESET_N_LS
J12.4

4

SPP1TX GPIO SPI SPI_1_MOSI_LS
J12.5

5

19.2mhz GPIO CLK_192PM_LS
J12.6

6

SPP1FS0 GPIO SPI SPI_1_FS0_LS
J12.7

7

UART0TX GPIO UART_0_TXD_LS
J12.8

8

SPP1FS2 GPIO SPI SPI_1_FS2_LS
J12.9

9

PWRGD NONE PMIC_PWRGOOD_LS
J12.10

10

SPP1CLK GPIO SPI SPI_1_CLK_LS
J12.11

11

I2C0SDA I2C I2C_0_SDA_LS
J12.12

12

I2S1SDI GPIO I2S_1_RXD_LS
J12.13

13

I2C0SCL I2C I2C_0_SCL_LS
J12.14

14

I2S1SDO GPIO I2S_1_TXD_LS
J12.15

15

IIC0SDA I2C

ISH_I2C_0_SDA_LS

J12.16

16

I2S1WS GPIO

I2S_1_FS_LS

J12.17

17

I2C1SCL I2C

ISH_I2C_0_SCL_LS

J12.18

18

I2S1CLK GPIO

I2S_1_CLK_LS

J12.19

19

I2C2SDA I2C

ISH_I2C_1_SDA_LS

J12.20

20

I2S1MCL GPIO

CODEC_MCLK_LS

J12.21

21

I2C2SCL I2CO

ISH_I2C_1_SCL_LS

J12.22

22

UART1TX UART

UART_1_TXD_LS

J12.23

23

I2S4SDO NONE

ISH_GPIO_6_LS

J12.24

24

UART1RX UART

UART_1_RXD_LS

J12.25

25

I2S4SDI NONE

ISH_GPIO_5_LS

J12.26

26

PWM0 GPIO PWM

PWM_0_ LS

J12.27

27

I2S4BLK GPIO

ISH_GPIO_4_LS

J12.28

28

PWM1 GPIO PWM

PWM_1_LS

J12.29

29

I2S4WS NONE

ISH_GPIO_3_LS

J12.30

30

PWM2 GPIO PWM

PWM_2_LS

J12.31

31

I2S3SDO NONE

ISH_GPIO_2_LS

J12.32

32

PWM3 GPIO PWM

PWM_3_LS

J12.33

33

I2S3SDI NONE

ISH_GPIO_1_LS

J12.34

34

1.8V NONE

+VDD1

J12.35

35

I2S4BLK GPIO

ISH_GPIO_0_LS

J12.36

36

GND NONE

GND

J12.37

37

GND NONE

GND

J12.38

38

GND NONE

GND

J12.39

39

GND NONE

GND

J12.40

40

3.3V NONE

+VDD3

 

Expansion Board Connector J13

Expansion Board Pin Number MRAA Number Physical Pin Function Net Name at Breakout Module Pin Number
J13.1

41

GND NONE

GND

Multiple

J13.2

42

5V NONE

V5P0V

N / A

J13.3

43

GND NONE

GND

Multiple

J13.4

44

5V NONE

V5P0V

N / A

J13.5

45

GND NONE

GND

Multiple

J13.6

46

3.3V NONE

V3P3V

N / A

J13.7

47

GND NONE

GND

Multiple

J13.8

48

3.3V NONE

V3P3V

N / A

J13.9

49

GND NONE

GND

Multiple

J13.10

50

1.8V NONE

V1P8V

N / A

J13.11

51

GPIO GPIO

DISPLAY_0_REST_N_LS

J3.68

J13.12

52

1.8V NONE

V1P8V

N / A

J13.13

53

PANEL GPIO

DISPLAY_0_BIAS_EN_LS

J3.64

J13.14

54

GND NONE

GND

Multiple

J13.15

55

PANEL GPIO

DISPLAY_0_BKLT_EN_LS

J3.58

J13.16

56

CAMERA NONE

FLASH_TORCH_LS

J3.75

J13.17

57

PANEL GPIO

BLDRW_0_PWM_LS

J3.56

J13.18

58

CAMERA NONE

FLASH_RST_N_LS

J3.73

J13.19

59

SPP0FS0 GPIO SPI

SPI_0_FS0_LS

J3.77

J13.20

60

CAMERA NONE

FLASH_TRIGGER_LS

J3.71

J13.21

61

SPP0FS1 GPIO SPI

SPI_0_FS12_LS

J3.79

J13.22

62

SPI_DAT SPI

AVS_M_DATA_1_LS

J3.66

J13.23

63

SPP0FS2 GPIO SPI

SPI_0_FS2_LS

J3.53

J13.24

64

SPICLKB GPIO

AVS_M_CLK_B1_LS

J3.62

J13.25

65

SPP0FS3 GPIO SPI

SPI_0_CLK_LS

J3.59

J13.26

66

SPICLKA GPIO

AVS_M_CLK_A1_LS

J3.52

J13.27

67

SPP0TX GPIO SPI

SPI_0_MOSI_LS

J3.57

J13.28

68

UART0RX GPIO UART

UART_0_RXD_LS

J3.51

J13.29

69

SPP0RX GPIO SPI

SPI_0_MISO_LS

J3.49

J13.30

70

UART0RT GPIO UART

UART_0_RTS_LS

J3.55

J13.31

71

I2C1SDA I2C

I2C_1_SDA_LS

J3.45

J13.32

72

UART0CT GPIO UART

UART_0_CTS_LS

J3.47

J13.33

73

I2C1SCL I2C

I2C_1_SCL_LS

J3.43

J13.34

74

UART1TX GPIO UART

ISH_UART_0_TXD_LS

J3.15

J13.35

75

I2C2SDA I2C

I2C_2_SDA_LS

J3.26

J13.36

76

UART1RX GPIO UART

ISH_UART_0_RXD_LS

J3.13

J13.37

77

I2C2SCL I2C

I2C_2_SCL_LS

J3.28

J13.38

78

UART1RT GPIO UART

ISH_UART_0_RTS_LS

J3.11

J13.39

79

RTC_CLK GPIO

PMIC_SLPCLK_1_LS

J3.7

J13.40

80

UART1CT GPIO UART

ISH_UART_0_CTS_LS

J3.9

 

Other MRAA Numbers

MRAA Number Physical Pin Function

100

LED100 GPIO

101

LED101 GPIO

102

LED102 GPIO

103

LED103 GPIO

104

LEDWIFI GPIO

105

LEDBT GPIO

 

To see a live pin mapping, use the command: $ mraa-gpio list

Interface notes

SPI

Two SPI buses are available, with one chipselect each. Pins listed are MRAA numbered pins. Other chip selects are available if enabled in BIOS/EEPROM but cannot be enabled as BIOS options. You will need the spidev kernel module loaded. Ostro-XT and Ref-OS-IoT does this by default.

Bus 0 (32765) MOSI = 4 MISO = 2 CS = 6 CLK = 10

Bus 1 (32766) MOSI = 67 MISO = 69 CS0 = 59 CS1 = 61 CLK = 65

UART

Some pins are labelled as UARTs but are not configured in BIOS as UART so the only available UART is on the FTDI header. Disable the getty on ttyS2 and use mraa's uart raw mode to initialise on ttyS2. The Jumper J8 can be used to switch between using the FTDI 6 pin header and the micro USB output.

For more complete information about compiler optimizations, see our Optimization Notice.