Linux* GPIO Pinmapping

Pinmapping for the breakout connectors can be found in Module Board-to-Board Connector Pinout. The tables below provides the pin assignment, signal name, and description for the signals on the breakout connectors J12 and J13.

These signals are mapped by various operating systems in different ways, and that mapping can be redefined by software methods.

Breakout Connector J12

Expansion Board Pin Number Linux* GPIO Net Name at Breakout Module Pin Number
J12.1 451 GPIO_22_LS

J2.94

J12.2 421 SPI_1_MISO_LS

J2.63

J12.3 366 PMIC_RESET_N_LS

J2.13

J12.4 422 SPI_1_MOSI_LS

J2.51

J12.5 356 CLK_192PM_LS

J2.71

J12.6 417 SPI_1_FS0_LS

J2.55

J12.7 468 UART_0_TXD_LS

J2.93

J12.8 419 SPI_1_FS2_LS

J2.14

J12.9 365 PMIC_PWRGOOD_LS

J2.33

J12.10 416 SPI_1_CLK_LS

J2.53

J12.11 315 I2C_0_SDA_LS

J2.95

J12.12 381 I2S_1_RXD_LS

J2.47

J12.13 316 I2C_0_SCL_LS

J2.57

J12.14 382 I2S_1_TXD_LS

J2.49

J12.15 331

ISH_I2C_0_SDA_LS

J2.18

J12.16 380

I2S_1_FS_LS

J2.45

J12.17 332

ISH_I2C_0_SCL_LS

J2.16

J12.18 379

I2S_1_CLK_LS

J2.39

J12.19 333

ISH_I2C_1_SDA_LS

J2.23

J12.20 378

CODEC_MCLK_LS

J2.43

J12.21 334

ISH_I2C_1_SCL_LS

J2.21

J12.22 472

UART_1_TXD_LS

J2.28

J12.23 343

ISH_GPIO_6_LS

J2.31

J12.24 471

UART_1_RXD_LS

J2.26

J12.25 342

ISH_GPIO_5_LS

J2.38

J12.26 463

PWM_0_ LS

J2.1

J12.27 341

ISH_GPIO_4_LS

J2.29

J12.28 464

PWM_1_LS

J2.3

J12.29 340

ISH_GPIO_3_LS

J2.34

J12.30 465

PWM_2_LS

J2.22

J12.31 339

ISH_GPIO_2_LS

J2.32

J12.32 466

PWM_3_LS

J2.24

J12.33 338

ISH_GPIO_1_LS

J2.27

J12.34 N/A

+VDD1

J2.36

J12.35 337

ISH_GPIO_0_LS

J2.25

J12.36 N/A

GND

Multiple

J12.37 N/A

GND

Multiple

J12.38 N/A

GND

Multiple

J12.39 N/A

GND

Multiple

J12.40 N/A

+VDD3

J2.30

Expansion Board Connector J13

Expansion Board Pin Number Linux* GPIO Net Name at Breakout Module Pin Number
J13.1 N/A

GND

Multiple

J13.2 N/A

V5P0V

N / A

J13.3 N/A

GND

Multiple

J13.4 N/A

V5P0V

N / A

J13.5 N/A

GND

Multiple

J13.6 N/A

V3P3V

N / A

J13.7 N/A

GND

Multiple

J13.8 N/A

V3P3V

N / A

J13.9 N/A

GND

Multiple

J13.10 N/A

V1P8V

N / A

J13.11 456

DISPLAY_0_REST_N_LS

J3.68

J13.12 N/A

V1P8V

N / A

J13.13 270

DISPLAY_0_BIAS_EN_LS

J3.64

J13.14 N/A

GND

Multiple

J13.15 271

DISPLAY_0_BKLT_EN_LS

J3.58

J13.16 N/A

FLASH_TORCH_LS

J3.75

J13.17 272

BLDRW_0_PWM_LS

J3.56

J13.18 N/A

FLASH_RST_N_LS

J3.73

J13.19 411

SPI_0_FS0_LS

J3.77

J13.20 N/A

FLASH_TRIGGER_LS

J3.71

J13.21 412

SPI_0_FS12_LS

J3.79

J13.22 385

AVS_M_DATA_1_LS

J3.66

J13.23 413

SPI_0_FS2_LS

J3.53

J13.24 384

AVS_M_CLK_B1_LS

J3.62

J13.25 410

SPI_0_CLK_LS

J3.59

J13.26 383

AVS_M_CLK_A1_LS

J3.52

J13.27 414

SPI_0_MOSI_LS

J3.57

J13.28 467

UART_0_RXD_LS

J3.51

J13.29 415

SPI_0_MISO_LS

J3.49

J13.30 469

UART_0_RTS_LS

J3.55

J13.31 317

I2C_1_SDA_LS

J3.45

J13.32 470

UART_0_CTS_LS

J3.47

J13.33 318

I2C_1_SCL_LS

J3.43

J13.34 480

ISH_UART_0_TXD_LS

J3.15

J13.35 319

I2C_2_SDA_LS

J3.26

J13.36 479

ISH_UART_0_RXD_LS

J3.13

J13.37 320

I2C_2_SCL_LS

J3.28

J13.38 481

ISH_UART_0_RTS_LS

J3.11

J13.39 367

PMIC_SLPCLK_1_LS

J3.7

J13.40 482

ISH_UART_0_CTS_LS

J3.9

 

For more complete information about compiler optimizations, see our Optimization Notice.