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Xeon Phi, архитектура Knights Corner и улучшение пройденного

Если делаешь что-то хорошо и с душой, оно обязательно сослужит тебе хорошую службу. Иногда сразу, иногда через годы. Но никогда, никогда хорошо сделанное не исчезает бесследно.
Authored by vilianov Last updated on 05/06/2016 - 16:41
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Introduction to Embree 2.1 - Part 1

This is part of a series of blogs on Embree, a collection of high performance ray tracing kernels. Embree has been released open source since version 1.0.

Authored by Louis F. (Intel) Last updated on 11/17/2016 - 19:28
Article

O Intel® Xeon Phi™ é o coprocessador certo para você?

Saiba mais sobre o coprocessador Intel® Xeon Phi™ e o que ele pode fazer pelas aplicações que você desenvolve. 

Authored by Belinda Liviero (Intel) Last updated on 10/20/2016 - 16:19
Video

Academic Panel Overview at IDF 2013

Dr. Matthew Wolf, GA Tech, Dr.

Authored by Gerald M. (Intel) Last updated on 10/20/2016 - 16:19
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The Intel Xeon Phi coprocessor: What is it and why should I care? Part 2: Getting even more parallelism

TITLE: “The Intel Xeon Phi coprocessor: What is it and why should I care?”

PART 2: “Getting even more parallelism”

Authored by Taylor IoT Kidd Last updated on 08/23/2016 - 14:18
Article

Setting up LDAP Support for Intel® Xeon Phi™ Coprocessors

Alexander Gutkin, Sushmith Hiremath

US

Revision: 1.0

Authored by Alexander Gutkin (Intel) Last updated on 07/26/2016 - 11:08
Video

Advanced Intel® Xeon Phi™ Coprocessor Workshop Memory Part 2: Performance Tuning

Explicit and implicit memory models; advanced usages of each memory model, including asynchronous offload and buffering; BKMs to enable best performance of the memory hierarchy on KNC

Authored by Gerald M. (Intel) Last updated on 07/14/2016 - 14:28
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Understanding MPI Load Imbalance with Intel®Trace Analyzer and Collector

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Authored by Scott McMillan (Intel) Last updated on 06/16/2016 - 10:56
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Advanced Intel® Xeon Phi™ Coprocessor Workshop Memory Part 1: Basics

Explicit and implicit memory models; advanced usages of each memory model, including asynchronous offload and buffering; BKMs to enable best performance of the memory hierarchy on KNC

Authored by Gerald M. (Intel) Last updated on 06/08/2016 - 16:09
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