Filters

Forum topic

AVX in SGX

Are AVX instructions available to an enclave?

If so, would SGX protect the entire data path of the SIMD workload?

Thanks!

Authored by Arya Pourtabatabaie Last updated on 02/24/2017 - 09:08
Article

Intel® C++ Compiler 17.0 Release Notes

This page provides links to the current Release Notes for the Intel® C++ Compiler 17.0 component of Intel® Parallel Studio XE 2017 for Windows*, Linux* and macOS*. 

Authored by Kenneth Craft (Intel) Last updated on 02/22/2017 - 04:19
Article

Compiling for the Intel® Xeon Phi™ Processor and the Intel® Advanced Vector Extensions 512 ISA

This document briefly gives an overview of the Intel® Advanced Vector Extensions 512 (Intel® AVX-512) and shows different ways to build an application for the Intel® Xeon Phi™ processor x200 using the Intel® compiler.
Authored by Nguyen, Loc Q Last updated on 02/21/2017 - 13:14
Forum topic

Skylake Xeon and AVX-512VL

Hi all, please excuse my ignorance but I am just wondering if the Skylake Xeon processor is released to the market now?

Authored by Martin Z. Last updated on 02/16/2017 - 07:32
Article

Getting Started with Intel® Software Optimization for Theano* and Intel® Distribution for Python*

Theano* is a Python* library developed at the LISA lab to define, optimize, and evaluate mathematical expressions, including the ones with multi-dimensional arrays. Theano can be installed and used with several combinations of development tools and libraries on a variety of platforms. This tutorial provides one such recipe describing steps to build and install Intel-optimized Theano with Intel®...
Authored by Sunny G. (Intel) Last updated on 02/15/2017 - 15:27
Forum topic

why is ‘_mm512d load/store’ intrinsic changed to vmovups not vmovupd?

 

in my application, speed is very important. so I use intel advisor on my application, then I find that there are some type conversions.

Authored by Yeongha L. Last updated on 02/13/2017 - 07:00
Article

IPP Dispatcher Control Functions - ipp*Init*() functions

Initializing the IPP static and dynamic libraries for optimal performance.
Authored by Paul F. (Intel) Last updated on 02/08/2017 - 22:57
Article

Recipe: Building and Running MILC on Intel® Xeon® Processors and Intel® Xeon Phi™ Processors

MILC software represents a set of codes written by the MIMD Lattice Computation collaboration used to study quantum chromodynamics, the theory of the strong interactions of subatomic physics. This article provides instructions for code access, build, and run directions for the “ks_imp_rhmc” application on Intel® Xeon® processors and Intel® Xeon Phi™ processors.
Authored by Smahane D. (Intel) Last updated on 02/08/2017 - 15:57
Forum topic

Slightly OT, but maybe somebody has an idea.

    Hi,

(My question abot ISA-Extension is near the bottom of post)

today I has found a old piece of code, done time profiling and ....was nearly fallen from the chair.

Authored by Alexander L. Last updated on 02/06/2017 - 16:14
Article

Caffe* Optimized for Intel® Architecture: Applying Modern Code Techniques

This paper demonstrates a special version of Caffe* — a deep learning framework originally developed by the Berkeley Vision and Learning Center (BVLC) — that is optimized for Intel® architecture.
Authored by Vadim K. (Intel) Last updated on 02/03/2017 - 16:50
For more complete information about compiler optimizations, see our Optimization Notice.