Optimizing Torch Performance for Intel® Xeon Phi Processor Webinar

Learn how machine learning/deep learning applications benefit from code modernization.

Authored by Last updated on 03/21/2019 - 12:40
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Implementing MicroPython as a UEFI Test Framework

Since its introduction in 2005, the Unified Extensible Firmware Interface (UEFI) has become the primary standard for firmware development.

Authored by Brian Richardson (Intel) Last updated on 12/12/2018 - 18:00

Intel® Xeon® Processor Scalable Family Technical Overview

The new generation, the Intel® Xeon® processor Scalable family (formerly code-named Skylake-SP), is based on 14nm process technology, with many new and enhanced architecture changes including, Skylake Mesh Architecture and Intel® Advanced Vector Extensions 512 (Intel® AVX-512).
Authored by David Mulnix (Intel) Last updated on 07/06/2019 - 16:30

英特尔® 至强® 处理器可扩展家族技术概述

新一代英特尔® 至强® 处理器可扩展家族(原代号为 Skylake-SP)基于 14 纳米制程技术,对架构进行了全新优化,包括 Skylake Mesh 架构和英特尔® 高级矢量扩展指令集 512(英特尔® AVX-512)。
Authored by David Mulnix (Intel) Last updated on 07/06/2019 - 16:30

Intel® Xeon® Phi™ Processor Performance Monitoring Reference Manual

The Intel® Xeon® Phi™ Processor (code name Knights Landing) provides performance monitoring facilities that are a unique combination of Intel® Atom™ processor-like core performance monitoring units (PMU) and Intel® Xeon® processor based server class uncore capabilities.
Authored by Last updated on 07/06/2019 - 16:30