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Intel® Cluster Ready Recipes for StackIQ

Intel® Cluster Ready “recipes” are reference designs provided to help hardware vendors, platform integrators, and system integrators design and build certified Intel Cluster Ready systems. This is a list of all recipes featuring the StackIQ Rocks+* suite.
Authored by admin Last updated on 03/28/2019 - 08:48
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Intel® Cluster Ready Recipes for Platform Computing*

Intel® Cluster Ready “recipes” are reference designs provided to help hardware vendors, platform integrators, and system integrators design and build certified Intel Cluster Ready systems. This is a list of all recipes featuring the Platform* suite.
Authored by admin Last updated on 03/28/2019 - 08:48
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Intel® Cluster Ready Recipes for OSCAR-Pro*

Intel® Cluster Ready “recipes” are reference designs provided to help hardware vendors, platform integrators, and system integrators design and build certified Intel Cluster Ready systems. This is a list of all recipes featuring the OSCAR-Pro* suite.
Authored by admin Last updated on 03/28/2019 - 08:48
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Recipe: Building and Running MASNUM WAVE for Intel® Xeon Phi™ Processors

This article provides a recipe for how to obtain, compile, and run an optimized version of MASNUM WAVE (0.2 degree high resolution) workload on Intel® Xeon® processors and Intel® Xeon Phi™ processors.
Authored by Last updated on 10/01/2019 - 14:32
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Recipe: Building and Running VLPL-S for Intel® Xeon Phi™ Processors

This article provides a recipe for how to obtain, compile, and run an optimized version of VLPL-S on Intel® Xeon® processors and Intel® Xeon Phi™ processors.
Authored by Last updated on 10/01/2019 - 14:34
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Recipe: ROME1.0/SML for the Intel® Xeon Phi™ Processor 7250

This article provides a recipe for how to obtain, compile, and run ROME1.0 SML on Intel® Xeon® processors and Intel® Xeon Phi™ processors.
Authored by Yu-Ping Z. (Intel) Last updated on 10/01/2019 - 14:44