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OpenMP* and the Intel® IPP Library

How to configure OpenMP in the Intel IPP library to maximize multi-threaded performance of the Intel IPP primitives.
Authored by Last updated on 07/31/2019 - 14:30
Article

Os Três Estágios da Preparação para Otimização de Software Paralelo

A melhoria de desempenho no software paralelo requer uma abordagem estruturada que faça um bom uso dos recursos de desenvolvimento, obtendo bons resultados rapidamente.

Authored by aaron-tersteeg (Intel) Last updated on 07/05/2019 - 10:15
Article

Tutorial: OpenCL* - Introduction for HPC Programmers

To the Intel® SDK for OpenCL* Applications main page

Authored by Last updated on 05/31/2019 - 14:10
Article

Configuring Intel® MKL in Microsoft* Visual Studio*

Intel MKL in Microsoft Visual Studio
Authored by Last updated on 07/03/2019 - 20:00
Article

Using Windows* Registry Hooks to Invoke Intel® VTune™ Amplifier XE to Profile Windows* Services

The article describes how to profile Windows* services by launching them from Intel® VTune™ Amplifier. This trick is useful for cases when attaching to process is not applicable.
Authored by Kirill R. (Intel) Last updated on 07/06/2019 - 11:17
Article

Trac, SVN的安装以及配置

Trac, SVN, Apache安装与配置及整合
Authored by Last updated on 02/22/2019 - 16:10
Blog post

Considerations for tuning Your Intel® Xeon Linux*/Apache* Server

In this blog, I will discuss a list of useful Linux commands to run, to tune your system for running the Apache web service, as well as some Apache tuning configuration changes which have shown to

Authored by Thai Le (Intel) Last updated on 07/06/2019 - 17:00
Blog post

Exploring Intel® Transactional Synchronization Extensions with Intel® Software Development Emulator

Intel® Transactional Synchronization Extensions (Intel® TSX) is perhaps one of the most non-trivial extensions of instruction set architecture introduced in the 4th generation Intel® Cor

Authored by Roman Dementiev (Intel) Last updated on 07/06/2019 - 17:00
Article

How to run Intel® MPI on the Intel® Xeon Phi™ Coprocessor

Support for the Intel® Xeon Phi™ coprocessor (formerly code named Knights Corner) is being

Authored by Gergana S. (Blackbelt) Last updated on 07/06/2019 - 16:40