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Intel® AVX2 optimization in Intel® MKL

The specific optimization and general support for the latest Intel® AVX2 instructions have been added in the Intel MKL v11.0. This article lists the specific functions that are optimized for Intel AVX2.
Authored by Last updated on 07/06/2019 - 16:30
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Blog post

Exploring Intel® Transactional Synchronization Extensions with Intel® Software Development Emulator

Intel® Transactional Synchronization Extensions (Intel® TSX) is perhaps one of the most non-trivial extensions of instruction set architecture introduced in the 4th generation Intel® Cor

Authored by Roman Dementiev (Intel) Last updated on 07/06/2019 - 17:00
Blog post

Is it time to replace the TOP 500 list?

A new TOP500 list was released at SC12. Is this one-dimensional benchmark still relevant in today's diverse HPC fields of computation?
Authored by Clay B. (Blackbelt) Last updated on 07/06/2019 - 17:00
Article

Introduction to the Intel® MKL Extended Eigensolver

 

Authored by Zhang, Zhang (Intel) Last updated on 07/06/2019 - 16:30
Article

Optimizing Memory Bandwidth on Stream Triad

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Authored by Karthik Raman (Intel) Last updated on 07/06/2019 - 16:40
Article

Using Intel® MPI Library and Intel® Xeon Phi™ Coprocessor Tips

1. Check prerequisites Each host and each Intel® Xeon Phi™ coprocessor should have a unique IP address across a cluster;
Authored by Dmitry S. (Intel) Last updated on 06/14/2019 - 13:39
Article

介绍一种服务器缓存结构 --- 多级 Hash

       现在的服务器网络数据收发与存储没有不做缓存的。

Authored by Last updated on 07/05/2019 - 14:07