Blog post

Benefits of Intel® Cache Monitoring Technology in the Intel® Xeon® Processor E5 v3 Family

Read about cache monitoring technology (CMT), which is part of Intel® Resource Director Technology (Intel® RDT), how it works and ways it is used.
Authored by Nguyen, Khang T (Intel) Last updated on 07/06/2019 - 17:10
Blog post

Improving MPI Communication between the Intel® Xeon® Host and Intel® Xeon Phi™

MPI Symmetric Mode is widely used in systems equipped with Intel® Xeon Phi™ coprocessors.

Authored by Nguyen, Loc Q (Intel) Last updated on 07/06/2019 - 17:10
Article
Blog post

Advanced Computer Concepts for the (Not So) Common Chef: The Home Kitchen

Since that brief aside on terminology is out of the way, let us continue with the kitchen analogy.

Authored by Last updated on 07/06/2019 - 17:10
Article

What is Code Modernization?

Modern high performance computers are built with a combination of resources including:

Authored by Mike P. (Intel) Last updated on 07/06/2019 - 16:30
Blog post

Code Modernization Launch at ISC

Check out the video interview with Scott Apeland (Director, Intel Developer Programs) 

Authored by Mike P. (Intel) Last updated on 07/06/2019 - 19:20
Blog post

Free Online Training on Parallel Programming and Optimization

The Colfax Hands On Workshop (HOW) training series is an integral part of the Intel Modern Code Developer program which supports developers in leveraging application performance in code through a systematic optimization methodology. Attendees of these workshops may receive a certificate of completion. The certificate states the Fundamental level of accomplishment in the Parallel Programming Track...
Authored by Mike P. (Intel) Last updated on 07/06/2019 - 17:10
Blog post

A Guide to Optimization Techniques for the Intel® MIC Architecture

A 3-part educational series on Optimization Techniques for the Intel® MIC Architecture is provided by Colfax Research. The series focuses on select topics on optimization of applications for Intel’s multi-core and manycore architectures (Intel® Xeon® processors and Intel® Xeon Phi™ processors).
Authored by Iman S. (Intel) Last updated on 07/06/2019 - 16:40
Article

Caffe* Training on Multi-node Distributed-memory Systems Based on Intel® Xeon® Processor E5 Family

Caffe is a deep learning framework developed by the Berkeley Vision and Learning Center (BVLC) and one of the most popular community frameworks for image recognition. Caffe is often used as a benchmark together with AlexNet*, a neural network topology for image recognition, and ImageNet*, a database of labeled images.
Authored by Gennady F. (Blackbelt) Last updated on 07/05/2019 - 14:54
Article

基于英特尔® 至强™ 处理器 E5 产品家族的多节点分布式内存系统上的 Caffe* 培训

Caffe is a deep learning framework developed by the Berkeley Vision and Learning Center (BVLC) and one of the most popular community frameworks for image recognition. Caffe is often used as a benchmark together with AlexNet*, a neural network topology for image recognition, and ImageNet*, a database of labeled images.
Authored by Gennady F. (Blackbelt) Last updated on 07/05/2019 - 14:55