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Programming and Compiling for Intel® Many Integrated Core Architecture

This article discussions parallelization and provides links that will help you understand your programming environment and evaluate the suitability of your app.
Authored by AmandaS (Intel) Last updated on 03/26/2019 - 10:07
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Efficient Parallelization

This article is part of the Intel® Modern Code Developer Community documentation which supports developers in leveraging application performance in code through a systematic step-by-step optimization framework methodology. This article addresses: Thread level parallelization.
Authored by Ronald W Green (Blackbelt) Last updated on 03/21/2019 - 12:00
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Parallelization Using OpenMP*

 

Compiler Methodology for Intel® MIC Architecture

Authored by admin Last updated on 03/21/2019 - 12:00
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OpenMP* Thread Affinity Control

Compiler Methodology for Intel® MIC Architecture

Authored by admin Last updated on 03/21/2019 - 12:00
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OpenMP* Loop Scheduling

Compiler Methodology for Intel® MIC Architecture

Authored by admin Last updated on 03/21/2019 - 12:00
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OpenMP Loop Collapse Directive

Compiler Methodology for Intel® MIC Architecture

Authored by admin Last updated on 03/21/2019 - 12:00
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OpenMP Related Tips

Compiler Methodology for Intel® MIC Architec

Authored by AmandaS (Intel) Last updated on 03/21/2019 - 12:00
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Programming for Multicore and Many-core Products including Intel® Xeon® processors and Intel® Xeon Phi™ X100 Product Family coprocessors

The programming models in use today, used for multicore processors every day, are available for many-core coprocessors as well. Therefore, explaining how to program both Intel Xeon processors and Intel Xeon Phi coprocessor is best done by explaining the options for parallel programming. This paper provides the foundation for understanding how multicore processors and many-core coprocessors are...
Authored by James R. (Blackbelt) Last updated on 06/14/2019 - 12:10
Article

Element-wise Alignment Requirements for Data Accesses to be ABI-Compliant on the Intel® MIC Architecture

 

Compiler Methodology for Intel® MIC Architecture

Authored by Rakesh Krishnaiyer (Intel) Last updated on 03/21/2019 - 12:08
Article

OpenMP* 4.0 Features in Intel C++ Composer XE 2013

The current OpenMP* 4.0 RC1 specification and associated TR1 technical report (both available from http://openmp.org) adds new features for controlling vectorization and execution on coprocessors.

Authored by Last updated on 03/21/2019 - 12:08