Blog post

Using HLE and RTM with older compilers with tsx-tools

To use HLE/RTM to improve lock scalability the lock library needs to be enabled.

Authored by Andreas Kleen (Intel) Last updated on 06/14/2017 - 13:26
Blog post

TSX fallback paths

The need for fallback paths
Authored by Andreas Kleen (Intel) Last updated on 06/14/2017 - 13:26
Blog post

Transactional memory support: the speculative_spin_mutex

Intel recently released the 4th Generation Intel® Core™ processors, which have Intel® Transaction

Authored by Last updated on 05/28/2018 - 18:30
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Transactional Memory Support: the speculative_spin_rw_mutex (Community Preview Feature)

In a previous post I discussed the Intel® Tra

Authored by Last updated on 06/14/2017 - 15:46
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Coarse-grained locks and Transactional Synchronization explained

Coarse-grained locks, and the importance of transactions, are key concepts that motivate why Intel Transactional Synchronization Extensions (TSX) is useful.  I’ll do my best to explain them in this

Authored by James R. (Blackbelt) Last updated on 03/10/2019 - 22:08
Blog post

Debug Intel® Transactional Synchronization Extensions

If printf or fprintf functions cause transaction aborts, use Intel® Processor Trace as a work-around.
Authored by Roman Dementiev (Intel) Last updated on 07/04/2019 - 17:00
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Fun with Intel® Transactional Synchronization Extensions

By now, many of you have heard of Intel® Transactional Synchronization Extensions (Intel® TSX).

Authored by Last updated on 07/04/2019 - 17:00
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Monitoring Intel® Transactional Synchronization Extensions with Intel® PCM

After applying a new technology (a new processor, a hardware accelerator, a new instruction, etc) besides measuring the immediate performance delta one requires a method to verify that this technol

Authored by Roman Dementiev (Intel) Last updated on 07/04/2019 - 17:00
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Intel® Transactional Synchronization Extensions (Intel® TSX) profiling with Linux perf

Intel® TSX exposes a speculative execution mode to the programmer to improve locking performance.. Tuning speculation requires heavily on a PMU profiler.

Authored by Andreas Kleen (Intel) Last updated on 07/04/2019 - 17:00
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Exposing Processor Features to Dynamic Languages

Intel® for its part invests countless hours and billions of transistors to add features in our silicon products which will speed up people's lives. If only they knew how to take advantage of it! Part of our job in dynamic languages is what I call "putting the cookies on the bottom shelf". Make this advanced technology easily consumable, and show you the value of it so you can be sure to use it.
Authored by David S. (Blackbelt) Last updated on 07/04/2019 - 19:43