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Parallel Universe Magazine - Issue 30, October 2017

Authored by admin Last updated on 03/21/2019 - 12:00
Article

User Defined Induction in OpenMP* with Intel® C++ Compiler

Intel® C++ Compiler 19.0 supports General Induction, a proposed OpenMP* 5.0 feature as an extension to the existing linear clause.
Authored by Sravani K. (Intel) Last updated on 01/31/2019 - 10:29
Blog post

The Unfairness of Good Syntax

The unfairness of good syntax - bad syntax is a problem; good syntax is not a solution.
Authored by Last updated on 07/04/2019 - 11:17
Blog post

Optimization of Data Read/Write in a Parallel Application

(This work was done by Vivek Lingegowda during his internship at Intel.)

Authored by Last updated on 07/04/2019 - 17:40
Article

Multithreaded Code Optimization in PARSEC* 3.0: BlackScholes

Learn about the Blach-Scholes benchmark, part of the benchmark suite of multithreaded programs that comprise the Princeton Application Repository for Shared-Memory Computers (PARSEC).
Authored by Artem G. (Intel) Last updated on 07/04/2019 - 21:42
Article

PARSEC* 3.0 中的多线程代码优化: BlackScholes

The Black-Scholes benchmark is a one of the 13 benchmarks in the PARSEC. This benchmark does option pricing with Black-Scholes Partial Differential Equation (PDE). The Black-Scholes equation is a differential equation that describes how, under a certain set of assumptions, the value of an option changes as the price of the underlying asset changes. Based on this formula, one can compute the...
Authored by Artem G. (Intel) Last updated on 07/04/2019 - 21:42
Article

Case Study: Computing Black-Scholes with Intel® Advanced Vector Extensions

Case study discusses Intel® Advanced Vector Extensions (Intel® AVX), gives an overview of Black-Scholes valuation.
Authored by Last updated on 07/06/2019 - 16:27
Article

基于英特尔® 架构加速金融应用

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Authored by George Raskulinec (Intel) Last updated on 07/06/2019 - 16:40
Article

Accelerating Financial Applications on Intel® architecture

Learn more about an in-depth analysis of code modernization performance conducted by optimizing original CPU code and re-running tests on the latest GPU/CPU hardware.
Authored by George Raskulinec (Intel) Last updated on 07/06/2019 - 16:40